Use recently added R-Car Gen 2 fallback binding for i2c nodes in
DT for r8a7793 SoC.
This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7793 and the
fallback binding for R-Car Gen 2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
i2c1: i2c@e6518000 {
#address-cells = <1>;
#size-cells = <0>;
i2c1: i2c@e6518000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
i2c2: i2c@e6530000 {
#address-cells = <1>;
#size-cells = <0>;
i2c2: i2c@e6530000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
i2c3: i2c@e6540000 {
#address-cells = <1>;
#size-cells = <0>;
i2c3: i2c@e6540000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
i2c4: i2c@e6520000 {
#address-cells = <1>;
#size-cells = <0>;
i2c4: i2c@e6520000 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
/* doesn't need pinmux */
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7793";
+ compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C5>;