Some code was missing the CONFIG_DRM_AMD_DC_DSC_SUPPORT guard.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
/* Power gate DSCs */
for (i = 0; i < res_pool->res_cap->num_dsc; i++)
dcn20_dsc_pg_control(hws, res_pool->dscs[i]->inst, false);
/* Power gate DSCs */
for (i = 0; i < res_pool->res_cap->num_dsc; i++)
dcn20_dsc_pg_control(hws, res_pool->dscs[i]->inst, false);
/* Blank pixel data with OPP DPG */
for (i = 0; i < dc->res_pool->timing_generator_count; i++) {
/* Blank pixel data with OPP DPG */
for (i = 0; i < dc->res_pool->timing_generator_count; i++) {