]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-next
authorStephen Boyd <sboyd@codeaurora.org>
Sat, 27 Jan 2018 00:41:58 +0000 (16:41 -0800)
committerStephen Boyd <sboyd@codeaurora.org>
Sat, 27 Jan 2018 00:41:58 +0000 (16:41 -0800)
* clk-iproc:
  clk: iproc: Minor tidy up of iproc pll data structures
  clk: iproc: Allow plls to do minor rate changes without reset
  clk: iproc: Fix error in the pll post divider rate calculation
  clk: iproc: Allow iproc pll to runtime calculate vco parameters

* clk-mvebu:
  clk: mvebu: armada-37xx-periph: Use PTR_ERR_OR_ZERO()

* clk-qcom-a53:
  clk: qcom: Add APCS clock controller support
  clk: qcom: Add regmap mux-div clocks support
  clk: qcom: Add A53 PLL support

1  2  3  4 
drivers/clk/mvebu/armada-37xx-periph.c
drivers/clk/qcom/Kconfig
drivers/clk/qcom/Makefile

index ee8637c2b189fdb6004b5ed346c3a9fd5509b567,cecb0fdfaef6cd354893f9f4628427c7dee655e5,72e2ce46f4b023dcb282f65f06b40da0f34f0cd7,cecb0fdfaef6cd354893f9f4628427c7dee655e5..87213ea7fc84f32690d0849c6006b86882636a27
@@@@@ -614,34 -354,15 -354,12 -354,15 +614,31 @@@@@ static int armada_3700_add_composite_cl
                }
        }
    
 - -    *hw = clk_hw_register_composite(dev, data->name, data->parent_names,
 - -                                   data->num_parents, mux_hw,
 - -                                   mux_ops, rate_hw, rate_ops,
 - -                                   gate_hw, gate_ops, CLK_IGNORE_UNUSED);
 +++    if (data->muxrate_hw) {
 +++            struct clk_pm_cpu *pmcpu_clk;
 +++            struct clk_hw *muxrate_hw = data->muxrate_hw;
 +++            struct regmap *map;
  + 
 - -    if (IS_ERR(*hw))
 - -            return PTR_ERR(*hw);
 +++            pmcpu_clk =  to_clk_pm_cpu(muxrate_hw);
 +++            pmcpu_clk->reg_mux = reg + (u64)pmcpu_clk->reg_mux;
 +++            pmcpu_clk->reg_div = reg + (u64)pmcpu_clk->reg_div;
  + 
 - -    return 0;
 +++            mux_hw = muxrate_hw;
 +++            rate_hw = muxrate_hw;
 +++            mux_ops = muxrate_hw->init->ops;
 +++            rate_ops = muxrate_hw->init->ops;
 +++
 +++            map = syscon_regmap_lookup_by_compatible(
 +++                            "marvell,armada-3700-nb-pm");
 +++            pmcpu_clk->nb_pm_base = map;
 +++    }
 +++
 + +    *hw = clk_hw_register_composite(dev, data->name, data->parent_names,
  -                                    data->num_parents, mux_hw,
  -                                    mux_ops, rate_hw, rate_ops,
  -                                    gate_hw, gate_ops, CLK_IGNORE_UNUSED);
 +++                                    data->num_parents, mux_hw,
 +++                                    mux_ops, rate_hw, rate_ops,
 +++                                    gate_hw, gate_ops, CLK_IGNORE_UNUSED);
 + +
-       if (IS_ERR(*hw))
-               return PTR_ERR(*hw);
-   
-       return 0;
++ +    return PTR_ERR_OR_ZERO(*hw);
    }
    
    static int armada_3700_periph_clock_probe(struct platform_device *pdev)
Simple merge
index 602af3841522a6f4e1727212deb9d4629d91f252,26410d31446b51d49dcd2b032027b26e65f110f0,26410d31446b51d49dcd2b032027b26e65f110f0,0408cebf38d44a0102daa6794c558fa669228852..230332cf317e58e35f180c6febcc5d515df46384
@@@@@ -32,6 -32,5 -32,5 -33,7 +33,8 @@@@@ obj-$(CONFIG_MSM_LCC_8960) += lcc-msm89
    obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
    obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
    obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
+++ obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o
+++ obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o
    obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
    obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o
 +++obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o