]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
PCI: mobiveil: Fix the Class Code field
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Fri, 5 Jul 2019 09:56:35 +0000 (17:56 +0800)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Mon, 8 Jul 2019 11:22:10 +0000 (12:22 +0100)
Fix up the Class Code field in PCI configuration space and set it to
PCI_CLASS_BRIDGE_PCI.

Move the Class Code fixup to function mobiveil_host_init() where
it belongs.

Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
drivers/pci/controller/pcie-mobiveil.c

index 827218314ef39e38d5547e883ab09b4be8dc9efc..9e080612a97b55b694491ecaed8cbf025dcd1f32 100644 (file)
@@ -626,6 +626,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
                }
        }
 
+       /* fixup for PCIe class register */
+       value = csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS);
+       value &= 0xff;
+       value |= (PCI_CLASS_BRIDGE_PCI << 16);
+       csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS);
+
        /* setup MSI hardware registers */
        mobiveil_pcie_enable_msi(pcie);
 
@@ -866,9 +872,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
                goto error;
        }
 
-       /* fixup for PCIe class register */
-       csr_writel(pcie, 0x060402ab, PAB_INTP_AXI_PIO_CLASS);
-
        /* initialize the IRQ domains */
        ret = mobiveil_pcie_init_irq_domain(pcie);
        if (ret) {