drm/nouveau/gr/gf100-: virtualise init_zcull

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
index 0c92b8c6375a326c013360227c5e8d5d6b03feaf..56d9ead0b38010326b676f33acb54c40c12f13c7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
@@ -1930,6 +1930,34 @@ gf100_gr_init_gpc_mmu(struct gf100_gr *gr)
        nvkm_wr32(device, 0x4188b8, nvkm_memory_addr(fb->mmu_rd) >> 8);
 }
 
+void
+gf100_gr_init_zcull(struct gf100_gr *gr)
+{
+       struct nvkm_device *device = gr->base.engine.subdev.device;
+       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
+       u32 data[TPC_MAX / 8] = {};
+       u8  tpcnr[GPC_MAX];
+       int gpc, tpc;
+       int i;
+
+       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
+       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
+               do {
+                       gpc = (gpc + 1) % gr->gpc_nr;
+               } while (!tpcnr[gpc]);
+               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
+
+               data[i / 8] |= tpc << ((i % 8) * 4);
+       }
+
+       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
+       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
+       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
+       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
+
+       nvkm_wr32(device, GPC_BCAST(0x1bd4), magicgpc918);
+}
+
 void
 gf100_gr_init_vsc_stream_master(struct gf100_gr *gr)
 {
@@ -1941,11 +1969,7 @@ int
 gf100_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
-       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
-       u32 data[TPC_MAX / 8] = {};
-       u8  tpcnr[GPC_MAX];
        int gpc, tpc, rop;
-       int i;
 
        gr->func->init_gpc_mmu(gr);
 
@@ -1964,34 +1988,7 @@ gf100_gr_init(struct gf100_gr *gr)
                gr->func->init_bios(gr);
 
        gr->func->init_vsc_stream_master(gr);
-
-       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
-       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
-               do {
-                       gpc = (gpc + 1) % gr->gpc_nr;
-               } while (!tpcnr[gpc]);
-               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
-
-               data[i / 8] |= tpc << ((i % 8) * 4);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
-       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
-       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
-       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
-                         gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
-                                                        gr->tpc_total);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
-       }
-
-       if (device->chipset != 0xd7)
-               nvkm_wr32(device, GPC_BCAST(0x1bd4), magicgpc918);
-       else
-               nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
+       gr->func->init_zcull(gr);
 
        nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
 
@@ -2076,6 +2073,7 @@ gf100_gr = {
        .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
+       .init_zcull = gf100_gr_init_zcull,
        .mmio = gf100_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
index 45792a33fd6578c3169fcdd6232f94ebaf1d3a24..b322dc42476101aeeb0287158436931ad5ac505c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
@@ -125,6 +125,7 @@ struct gf100_gr_func {
        void (*init_r405a14)(struct gf100_gr *);
        void (*init_bios)(struct gf100_gr *);
        void (*init_vsc_stream_master)(struct gf100_gr *);
+       void (*init_zcull)(struct gf100_gr *);
        void (*init_rop_active_fbps)(struct gf100_gr *);
        void (*init_ppc_exceptions)(struct gf100_gr *);
        void (*init_swdx_pes_mask)(struct gf100_gr *);
@@ -147,6 +148,9 @@ struct gf100_gr_func {
 int gf100_gr_rops(struct gf100_gr *);
 int gf100_gr_init(struct gf100_gr *);
 void gf100_gr_init_vsc_stream_master(struct gf100_gr *);
+void gf100_gr_init_zcull(struct gf100_gr *);
+
+void gf117_gr_init_zcull(struct gf100_gr *);
 
 int gk104_gr_init(struct gf100_gr *);
 void gk104_gr_init_vsc_stream_master(struct gf100_gr *);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c
index 61b27b179e15d2b4efa96ffcfb0aa695b7f9d160..23c2613fa6bfa3d5834ac72586c801318e7ecea0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c
@@ -117,6 +117,7 @@ gf104_gr = {
        .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
+       .init_zcull = gf100_gr_init_zcull,
        .mmio = gf104_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c
index 992727f79439f720424141e247782c73cf0e03be..a79a7860732a9cc0b2b7c91d62e3836ed6ec3580 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c
@@ -115,6 +115,7 @@ gf108_gr = {
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_r405a14 = gf108_gr_init_r405a14,
        .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
+       .init_zcull = gf100_gr_init_zcull,
        .mmio = gf108_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c
index 07a57cc5074fb583cbca6593c1642393c029e683..fd8e13716d94f9b44c239356101b77fc2655763b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c
@@ -89,6 +89,7 @@ gf110_gr = {
        .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
+       .init_zcull = gf100_gr_init_zcull,
        .mmio = gf110_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
index 29ab01be71ec0529a0ae60abc5acea529e8954bc..01e213e4d1a908b5215443864028c1b90f6e077d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
@@ -120,11 +120,40 @@ gf117_gr_gpccs_ucode = {
        .data.size = sizeof(gf117_grgpc_data),
 };
 
+void
+gf117_gr_init_zcull(struct gf100_gr *gr)
+{
+       struct nvkm_device *device = gr->base.engine.subdev.device;
+       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
+       u32 data[TPC_MAX / 8] = {};
+       u8  tpcnr[GPC_MAX];
+       int gpc, tpc;
+       int i;
+
+       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
+       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
+               do {
+                       gpc = (gpc + 1) % gr->gpc_nr;
+               } while (!tpcnr[gpc]);
+               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
+
+               data[i / 8] |= tpc << ((i % 8) * 4);
+       }
+
+       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
+       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
+       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
+       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
+
+       nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
+}
+
 static const struct gf100_gr_func
 gf117_gr = {
        .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .mmio = gf117_gr_pack_mmio,
        .fecs.ucode = &gf117_gr_fecs_ucode,
        .gpccs.ucode = &gf117_gr_gpccs_ucode,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.c
index d3b06dd7702d82c3ea1a2d40421620ee734fdc1e..269922e9fca237c020862d63aa06c66d496914e5 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.c
@@ -180,6 +180,7 @@ gf119_gr = {
        .init = gf100_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
+       .init_zcull = gf100_gr_init_zcull,
        .mmio = gf119_gr_pack_mmio,
        .fecs.ucode = &gf100_gr_fecs_ucode,
        .gpccs.ucode = &gf100_gr_gpccs_ucode,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
index 835f498d6b98aa3559b5251f3ca7d2f86185ae73..d1b7fb8957fb19af377e01828be8898f626ebeca 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c
@@ -415,11 +415,7 @@ int
 gk104_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
-       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
-       u32 data[TPC_MAX / 8] = {};
-       u8  tpcnr[GPC_MAX];
        int gpc, tpc, rop;
-       int i;
 
        gr->func->init_gpc_mmu(gr);
 
@@ -429,32 +425,8 @@ gk104_gr_init(struct gf100_gr *gr)
                                        gr->func->clkgate_pack);
 
        gr->func->init_vsc_stream_master(gr);
+       gr->func->init_zcull(gr);
 
-       memset(data, 0x00, sizeof(data));
-       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
-       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
-               do {
-                       gpc = (gpc + 1) % gr->gpc_nr;
-               } while (!tpcnr[gpc]);
-               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
-
-               data[i / 8] |= tpc << ((i % 8) * 4);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
-       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
-       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
-       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
-                         gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
-                                                        gr->tpc_total);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
        nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
 
        gr->func->init_rop_active_fbps(gr);
@@ -544,6 +516,7 @@ gk104_gr = {
        .init = gk104_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .mmio = gk104_gr_pack_mmio,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
index eef7476e0ee89d4ade5083484dfe4c4289e13b48..0eba041cd399cc1547c9c828b158d4d1b1006318 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c
@@ -339,6 +339,7 @@ gk110_gr = {
        .init = gk104_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .mmio = gk110_gr_pack_mmio,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c
index ed4361a830a5e089f48b52dd48f5e47be4d5f17e..84a1664f9e46712ab39a648f8070560de366a8f7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c
@@ -105,6 +105,7 @@ gk110b_gr = {
        .init = gk104_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .mmio = gk110b_gr_pack_mmio,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c
index 4c8beb9c1708532259e1eb7d93c2aaee30580bc6..701199abf5f9ee73b9ea531a93ce561448d947fa 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.c
@@ -164,6 +164,7 @@ gk208_gr = {
        .init = gk104_gr_init,
        .init_gpc_mmu = gf100_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .mmio = gk208_gr_pack_mmio,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c
index de8b806b88fd9dfd8cc1e1b864a3974db04ffbf7..a806643ede7e6d328394ca80d66570df54a8374e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c
@@ -219,11 +219,7 @@ int
 gk20a_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
-       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
-       u32 data[TPC_MAX / 8] = {};
-       u8  tpcnr[GPC_MAX];
-       int gpc, tpc;
-       int ret, i;
+       int ret;
 
        /* Clear SCC RAM */
        nvkm_wr32(device, 0x40802c, 0x1);
@@ -246,31 +242,7 @@ gk20a_gr_init(struct gf100_gr *gr)
        nvkm_mask(device, 0x503018, 0x1, 0x1);
 
        /* Zcull init */
-       memset(data, 0x00, sizeof(data));
-       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
-       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
-               do {
-                       gpc = (gpc + 1) % gr->gpc_nr;
-               } while (!tpcnr[gpc]);
-               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
-
-               data[i / 8] |= tpc << ((i % 8) * 4);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
-       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
-       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
-       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
-                         gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
-                         gr->tpc_total);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
+       gr->func->init_zcull(gr);
 
        gr->func->init_rop_active_fbps(gr);
 
@@ -311,6 +283,7 @@ gk20a_gr_init(struct gf100_gr *gr)
 static const struct gf100_gr_func
 gk20a_gr = {
        .init = gk20a_gr_init,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
        .set_hww_esr_report_mask = gk20a_gr_set_hww_esr_report_mask,
        .rops = gf100_gr_rops,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
index 58c03d6c1c2dc2f836df6560e0259e0eb08186df..a5f5e05c21ac592728119a6ff57d8ee3ae2854fe 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
@@ -325,11 +325,7 @@ static int
 gm107_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
-       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
-       u32 data[TPC_MAX / 8] = {};
-       u8  tpcnr[GPC_MAX];
        int gpc, tpc, rop;
-       int i;
 
        gr->func->init_gpc_mmu(gr);
 
@@ -338,32 +334,8 @@ gm107_gr_init(struct gf100_gr *gr)
        gr->func->init_bios(gr);
 
        gr->func->init_vsc_stream_master(gr);
+       gr->func->init_zcull(gr);
 
-       memset(data, 0x00, sizeof(data));
-       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
-       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
-               do {
-                       gpc = (gpc + 1) % gr->gpc_nr;
-               } while (!tpcnr[gpc]);
-               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
-
-               data[i / 8] |= tpc << ((i % 8) * 4);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
-       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
-       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
-       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
-                         gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
-                                                        gr->tpc_total);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
        nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
 
        gr->func->init_rop_active_fbps(gr);
@@ -453,6 +425,7 @@ gm107_gr = {
        .init_gpc_mmu = gm107_gr_init_gpc_mmu,
        .init_bios = gm107_gr_init_bios,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .mmio = gm107_gr_pack_mmio,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
index 8583aad367afc9a5816b0709aa3f2e3f1b2de6f6..2ceef1737f8420c82494d99467ca2837e5a6f0a4 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
@@ -65,11 +65,7 @@ static int
 gm200_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
-       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
-       u32 data[TPC_MAX / 8] = {};
-       u8  tpcnr[GPC_MAX];
        int gpc, tpc, rop;
-       int i;
 
        gr->func->init_gpc_mmu(gr);
 
@@ -78,32 +74,8 @@ gm200_gr_init(struct gf100_gr *gr)
        gr->func->init_bios(gr);
 
        gr->func->init_vsc_stream_master(gr);
+       gr->func->init_zcull(gr);
 
-       memset(data, 0x00, sizeof(data));
-       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
-       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
-               do {
-                       gpc = (gpc + 1) % gr->gpc_nr;
-               } while (!tpcnr[gpc]);
-               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
-
-               data[i / 8] |= tpc << ((i % 8) * 4);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
-       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
-       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
-       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
-                         gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
-                                                        gr->tpc_total);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
        nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
        nvkm_wr32(device, GPC_BCAST(0x033c), nvkm_rd32(device, 0x100804));
 
@@ -212,6 +184,7 @@ gm200_gr = {
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_bios = gm107_gr_init_bios,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gm200_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .rops = gm200_gr_rops,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c
index 69479af1d829fa5ae0625a29daf3bf68be97d1ed..fcf86d5cf26faa0044b401121c9393af3a73b04e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c
@@ -65,6 +65,7 @@ gm20b_gr_set_hww_esr_report_mask(struct gf100_gr *gr)
 static const struct gf100_gr_func
 gm20b_gr = {
        .init = gk20a_gr_init,
+       .init_zcull = gf117_gr_init_zcull,
        .init_gpc_mmu = gm20b_gr_init_gpc_mmu,
        .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
        .set_hww_esr_report_mask = gm20b_gr_set_hww_esr_report_mask,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c
index edaaebbe76131aa190605e8d7b31affeada7a89b..7d3317eb3e54e5d2d080fc1c3902c5938dfc9f3a 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c
@@ -53,43 +53,15 @@ int
 gp100_gr_init(struct gf100_gr *gr)
 {
        struct nvkm_device *device = gr->base.engine.subdev.device;
-       const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
-       u32 data[TPC_MAX / 8] = {};
-       u8  tpcnr[GPC_MAX];
        int gpc, tpc, rop;
-       int i;
 
        gr->func->init_gpc_mmu(gr);
 
        gf100_gr_mmio(gr, gr->fuc_sw_nonctx);
 
        gr->func->init_vsc_stream_master(gr);
+       gr->func->init_zcull(gr);
 
-       memset(data, 0x00, sizeof(data));
-       memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
-       for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
-               do {
-                       gpc = (gpc + 1) % gr->gpc_nr;
-               } while (!tpcnr[gpc]);
-               tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
-
-               data[i / 8] |= tpc << ((i % 8) * 4);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
-       nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
-       nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
-       nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
-
-       for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
-                         gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
-                                                        gr->tpc_total);
-               nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
-       }
-
-       nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
        gr->func->init_num_active_ltcs(gr);
 
        gr->func->init_rop_active_fbps(gr);
@@ -161,6 +133,7 @@ gp100_gr = {
        .init = gp100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_num_active_ltcs = gp100_gr_init_num_active_ltcs,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c
index 821a6c4589e234112359b6b563e4da4f82f0f956..0d9bf6c27a7b6a710fd4d64ddea56373405cad04 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c
@@ -45,6 +45,7 @@ gp102_gr = {
        .init = gp100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_swdx_pes_mask = gp102_gr_init_swdx_pes_mask,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c
index e2e12975bb2cb07720e849c55bec6395ccc11b6a..67d567e3a2ac89a0e8d220dc4420d45e6ca42eac 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c
@@ -31,6 +31,7 @@ gp107_gr = {
        .init = gp100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_swdx_pes_mask = gp102_gr_init_swdx_pes_mask,

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c
index e90cc3c845ec460b64e1fa3ba26e1fe721261713..af06b10ba92f67cf257a3f40f85786694fd8bf42 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c
@@ -38,6 +38,7 @@ gp10b_gr = {
        .init = gp100_gr_init,
        .init_gpc_mmu = gm200_gr_init_gpc_mmu,
        .init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
+       .init_zcull = gf117_gr_init_zcull,
        .init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_num_active_ltcs = gp10b_gr_init_num_active_ltcs,