]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
mlxsw: spectrum_buffers: Add ability to veto pool's configuration
authorIdo Schimmel <idosch@mellanox.com>
Mon, 22 Apr 2019 12:08:43 +0000 (12:08 +0000)
committerDavid S. Miller <davem@davemloft.net>
Tue, 23 Apr 2019 05:09:32 +0000 (22:09 -0700)
Subsequent patches are going to need to veto changes in certain pools'
size and / or threshold type (mode).

Add two fields to the pool's struct that indicate if either of these
attributes is allowed to change and enforce that.

Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c

index 28f44116ad86e19fee54a313df9cc77a9a51964f..f49b8791dcd9167ecde66cb75733aa9301da2a0c 100644 (file)
@@ -16,6 +16,8 @@
 struct mlxsw_sp_sb_pr {
        enum mlxsw_reg_sbpr_mode mode;
        u32 size;
+       u8 freeze_mode:1,
+          freeze_size:1;
 };
 
 struct mlxsw_cp_sb_occ {
@@ -932,14 +934,27 @@ int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
 {
        struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
        u32 pool_size = mlxsw_sp_bytes_cells(mlxsw_sp, size);
+       const struct mlxsw_sp_sb_pr *pr;
        enum mlxsw_reg_sbpr_mode mode;
 
+       mode = (enum mlxsw_reg_sbpr_mode) threshold_type;
+       pr = &mlxsw_sp->sb_vals->prs[pool_index];
+
        if (size > MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_BUFFER_SIZE)) {
                NL_SET_ERR_MSG_MOD(extack, "Exceeded shared buffer size");
                return -EINVAL;
        }
 
-       mode = (enum mlxsw_reg_sbpr_mode) threshold_type;
+       if (pr->freeze_mode && pr->mode != mode) {
+               NL_SET_ERR_MSG_MOD(extack, "Changing this pool's threshold type is forbidden");
+               return -EINVAL;
+       };
+
+       if (pr->freeze_size && pr->size != size) {
+               NL_SET_ERR_MSG_MOD(extack, "Changing this pool's size is forbidden");
+               return -EINVAL;
+       };
+
        return mlxsw_sp_sb_pr_write(mlxsw_sp, pool_index, mode,
                                    pool_size, false);
 }