arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA

Setup a thermal zone driven by SoC temperature sensor. Create passive trip
points and bind them to CPUFreq cooling device that supports power
extension.

Based on work by Dien Pham <dien.pham.ry@renesas.com> for r8a7796 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 21fb7919d3bb4d82ddcfd3b90f58210058925b7f..7d5e19c8cbd529dd0f149e7ffce9189486f44f13 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -138,6 +138,7 @@ a57_0: cpu@0 {
                        clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
                        operating-points-v2 = <&cluster0_opp>;
                        capacity-dmips-mhz = <1024>;
+                       #cooling-cells = <2>;
                };
 
                a57_1: cpu@1 {
@@ -150,6 +151,7 @@ a57_1: cpu@1 {
                        clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
                        operating-points-v2 = <&cluster0_opp>;
                        capacity-dmips-mhz = <1024>;
+                       #cooling-cells = <2>;
                };
 
                a53_0: cpu@100 {
@@ -159,6 +161,7 @@ a53_0: cpu@100 {
                        power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
+                       #cooling-cells = <2>;
                        clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                        capacity-dmips-mhz = <560>;
@@ -2437,6 +2440,7 @@ sensor_thermal1: sensor-thermal1 {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 0>;
+                       sustainable-power = <3874>;
 
                        trips {
                                sensor1_crit: sensor1-crit {
@@ -2451,6 +2455,7 @@ sensor_thermal2: sensor-thermal2 {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 1>;
+                       sustainable-power = <3874>;
 
                        trips {
                                sensor2_crit: sensor2-crit {
@@ -2459,21 +2464,39 @@ sensor2_crit: sensor2-crit {
                                        type = "critical";
                                };
                        };
-
                };
 
                sensor_thermal3: sensor-thermal3 {
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
                        thermal-sensors = <&tsc 2>;
+                       sustainable-power = <3874>;
 
                        trips {
+                               target: trip-point1 {
+                                       temperature = <100000>;
+                                       hysteresis = <1000>;
+                                       type = "passive";
+                               };
+
                                sensor3_crit: sensor3-crit {
                                        temperature = <120000>;
                                        hysteresis = <1000>;
                                        type = "critical";
                                };
                        };
+                       cooling-maps {
+                               map0 {
+                                       trip = <&target>;
+                                       cooling-device = <&a57_0 0 2>;
+                                       contribution = <1024>;
+                               };
+                               map1 {
+                                       trip = <&target>;
+                                       cooling-device = <&a53_0 0 2>;
+                                       contribution = <1024>;
+                               };
+                       };
                };
        };