]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
pinctrl: st: Remove obsolete platforms from pinctrl-st dt doc
authorPeter Griffin <peter.griffin@linaro.org>
Wed, 14 Sep 2016 13:27:52 +0000 (14:27 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 15 Sep 2016 13:55:26 +0000 (15:55 +0200)
STiH415/6 SoC support is being removed from the kernel.
This patch updates the ST pinctrl dt doc and removes
references to these obsolete platforms. It also updates
the dt example to the currently supported STiH407
platform.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Cc: <linus.walleij@linaro.org>
Cc: <robh+dt@kernel.org>
Cc: <linux-gpio@vger.kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt

index e6cc5e8f6438d19d3edea4a2191205d19441b47e..013c675b5b64544b6e59e6758f0ff3e24e8a99ee 100644 (file)
@@ -30,8 +30,7 @@ Second type has a dedicated interrupt per gpio bank.
 
 Pin controller node:
 Required properties:
-- compatible   : should be "st,<SOC>-<pio-block>-pinctrl"
-       like st,stih415-sbc-pinctrl, st,stih415-front-pinctrl and so on.
+- compatible   : should be "st,stih407-<pio-block>-pinctrl"
 - st,syscfg            : Should be a phandle of the syscfg node.
 - st,retime-pin-mask   : Should be mask to specify which pins can be retimed.
        If the property is not present, it is assumed that all the pins in the
@@ -80,23 +79,23 @@ include/dt-bindings/interrupt-controller/irq.h
 
 Example:
        pin-controller-sbc {
-               #address-cells  = <1>;
-               #size-cells     = <1>;
-               compatible      = "st,stih415-sbc-pinctrl";
-               st,syscfg       = <&syscfg_sbc>;
-               reg             = <0xfe61f080 0x4>;
-               reg-names       = "irqmux";
-               interrupts      = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "irqmux";
-               ranges          = <0 0xfe610000 0x5000>;
-
-               PIO0: gpio@fe610000 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "st,stih407-sbc-pinctrl";
+               st,syscfg = <&syscfg_sbc>;
+               reg = <0x0961f080 0x4>;
+               reg-names = "irqmux";
+               interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
+               interrupt-names = "irqmux";
+               ranges = <0 0x09610000 0x6000>;
+
+               pio0: gpio@09610000 {
                        gpio-controller;
-                       #gpio-cells     = <2>;
+                       #gpio-cells = <2>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
-                       reg             = <0 0x100>;
-                       st,bank-name    = "PIO0";
+                       reg = <0x0 0x100>;
+                       st,bank-name = "PIO0";
                };
                ...
                pin-functions nodes follow...
@@ -166,7 +165,7 @@ pin-controller {
 
 sdhci0:sdhci@fe810000{
        ...
-       interrupt-parent = <&PIO3>;
+       interrupt-parent = <&pio3>;
        #interrupt-cells = <2>;
        interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */
        interrupt-names = "card-detect";