]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
intel_th: msu: Preserve pre-existing buffer configuration
authorAlexander Shishkin <alexander.shishkin@linux.intel.com>
Fri, 5 Jul 2019 14:14:25 +0000 (17:14 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 25 Jul 2019 11:03:19 +0000 (13:03 +0200)
The MSU configuration registers may contain buffer address/size set by
the BIOS or an external hardware debugger, which may want to take over
tracing from the driver when the driver is not actively tracing.

Preserve these settings when not actively tracing.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190705141425.19894-6-alexander.shishkin@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/hwtracing/intel_th/msu.c

index b200d9d1c7a0383426b7ce7b8a93ef1f56519d5e..fc9f15f36ad4e1a460f9a7f6aeb49a2e861d36a3 100644 (file)
@@ -143,6 +143,8 @@ struct msc {
        unsigned int            single_wrap : 1;
        void                    *base;
        dma_addr_t              base_addr;
+       u32                     orig_addr;
+       u32                     orig_sz;
 
        /* <0: no buffer, 0: no users, >0: active users */
        atomic_t                user_count;
@@ -767,6 +769,9 @@ static int msc_configure(struct msc *msc)
                msc_buffer_clear_hw_header(msc);
        }
 
+       msc->orig_addr = ioread32(msc->reg_base + REG_MSU_MSC0BAR);
+       msc->orig_sz   = ioread32(msc->reg_base + REG_MSU_MSC0SIZE);
+
        reg = msc->base_addr >> PAGE_SHIFT;
        iowrite32(reg, msc->reg_base + REG_MSU_MSC0BAR);
 
@@ -841,8 +846,8 @@ static void msc_disable(struct msc *msc)
 
        msc->enabled = 0;
 
-       iowrite32(0, msc->reg_base + REG_MSU_MSC0BAR);
-       iowrite32(0, msc->reg_base + REG_MSU_MSC0SIZE);
+       iowrite32(msc->orig_addr, msc->reg_base + REG_MSU_MSC0BAR);
+       iowrite32(msc->orig_sz, msc->reg_base + REG_MSU_MSC0SIZE);
 
        dev_dbg(msc_dev(msc), "MSCnNWSA: %08x\n",
                ioread32(msc->reg_base + REG_MSU_MSC0NWSA));