]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu: added function to wait for PSP BL availability
authorJohn Clements <john.clements@amd.com>
Fri, 3 Jan 2020 09:27:04 +0000 (17:27 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 7 Jan 2020 16:58:50 +0000 (11:58 -0500)
reduced duplicate code

increased wait time for PSP BL readiness

Signed-off-by: John Clements <john.clements@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

index c66ca8cc2ebdbd23b0a8ae77aad335a0dfb37bd9..a57f3d73767762bad1e305029298d431796cfacd 100644 (file)
@@ -233,6 +233,29 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
        return err;
 }
 
+int psp_v11_0_wait_for_bootloader(struct psp_context *psp)
+{
+       struct amdgpu_device *adev = psp->adev;
+
+       int ret;
+       int retry_loop;
+
+       for (retry_loop = 0; retry_loop < 10; retry_loop++) {
+               /* Wait for bootloader to signify that is
+                   ready having bit 31 of C2PMSG_35 set to 1 */
+               ret = psp_wait_for(psp,
+                                  SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
+                                  0x80000000,
+                                  0x80000000,
+                                  false);
+
+               if (ret == 0)
+                       return 0;
+       }
+
+       return ret;
+}
+
 static bool psp_v11_0_is_sos_alive(struct psp_context *psp)
 {
        struct amdgpu_device *adev = psp->adev;
@@ -258,9 +281,7 @@ static int psp_v11_0_bootloader_load_kdb(struct psp_context *psp)
                return 0;
        }
 
-       /* Wait for bootloader to signify that is ready having bit 31 of C2PMSG_35 set to 1 */
-       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                          0x80000000, 0x80000000, false);
+       ret = psp_v11_0_wait_for_bootloader(psp);
        if (ret)
                return ret;
 
@@ -276,9 +297,7 @@ static int psp_v11_0_bootloader_load_kdb(struct psp_context *psp)
        WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
               psp_gfxdrv_command_reg);
 
-       /* Wait for bootloader to signify that is ready having  bit 31 of C2PMSG_35 set to 1*/
-       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                          0x80000000, 0x80000000, false);
+       ret = psp_v11_0_wait_for_bootloader(psp);
 
        return ret;
 }
@@ -298,9 +317,7 @@ static int psp_v11_0_bootloader_load_sysdrv(struct psp_context *psp)
                return 0;
        }
 
-       /* Wait for bootloader to signify that is ready having bit 31 of C2PMSG_35 set to 1 */
-       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                          0x80000000, 0x80000000, false);
+       ret = psp_v11_0_wait_for_bootloader(psp);
        if (ret)
                return ret;
 
@@ -319,8 +336,7 @@ static int psp_v11_0_bootloader_load_sysdrv(struct psp_context *psp)
        /* there might be handshake issue with hardware which needs delay */
        mdelay(20);
 
-       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                          0x80000000, 0x80000000, false);
+       ret = psp_v11_0_wait_for_bootloader(psp);
 
        return ret;
 }
@@ -337,9 +353,7 @@ static int psp_v11_0_bootloader_load_sos(struct psp_context *psp)
        if (psp_v11_0_is_sos_alive(psp))
                return 0;
 
-       /* Wait for bootloader to signify that is ready having bit 31 of C2PMSG_35 set to 1 */
-       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
-                          0x80000000, 0x80000000, false);
+       ret = psp_v11_0_wait_for_bootloader(psp);
        if (ret)
                return ret;