]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: rockchip: add clock-cells for usb phy nodes
authorHeiko Stuebner <heiko@sntech.de>
Thu, 19 Nov 2015 21:22:27 +0000 (22:22 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 25 Jan 2016 14:05:46 +0000 (15:05 +0100)
Add the #clock-cells properties for the usbphy nodes as they
provide the pll-clocks now.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3066a.dtsi
arch/arm/boot/dts/rk3188.dtsi
arch/arm/boot/dts/rk3288.dtsi

index 81cf60c427123c5a305bc65b61b78055ee033fbb..56922730d285e72b0faf5617c4efd6502dec80ec 100644 (file)
@@ -202,6 +202,7 @@ usbphy0: usb-phy0 {
                        reg = <0x17c>;
                        clocks = <&cru SCLK_OTGPHY0>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
 
                usbphy1: usb-phy1 {
@@ -209,6 +210,7 @@ usbphy1: usb-phy1 {
                        reg = <0x188>;
                        clocks = <&cru SCLK_OTGPHY1>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
        };
 
index 348d46b7ada5a07ebdefe4dafc1630ddd079c0b7..9271833958f9dcd506d2b0365671414c4ec72460 100644 (file)
@@ -171,6 +171,7 @@ usbphy0: usb-phy0 {
                        reg = <0x10c>;
                        clocks = <&cru SCLK_OTGPHY0>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
 
                usbphy1: usb-phy1 {
@@ -178,6 +179,7 @@ usbphy1: usb-phy1 {
                        reg = <0x11c>;
                        clocks = <&cru SCLK_OTGPHY1>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
        };
 
index c5d7e61c2272640efc0a0079db717e7ba3d2084e..6abbab67ce990f0880fdba27127754a2c7b62322 100644 (file)
@@ -968,6 +968,7 @@ usbphy0: usb-phy0 {
                        reg = <0x320>;
                        clocks = <&cru SCLK_OTGPHY0>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
 
                usbphy1: usb-phy1 {
@@ -975,6 +976,7 @@ usbphy1: usb-phy1 {
                        reg = <0x334>;
                        clocks = <&cru SCLK_OTGPHY1>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
 
                usbphy2: usb-phy2 {
@@ -982,6 +984,7 @@ usbphy2: usb-phy2 {
                        reg = <0x348>;
                        clocks = <&cru SCLK_OTGPHY2>;
                        clock-names = "phyclk";
+                       #clock-cells = <0>;
                };
        };