]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
dmaengine: sun6i: Add support for Allwinner A23 (sun8i) variant
authorChen-Yu Tsai <wens@csie.org>
Fri, 7 Nov 2014 04:15:47 +0000 (12:15 +0800)
committerVinod Koul <vinod.koul@intel.com>
Mon, 17 Nov 2014 08:20:37 +0000 (13:50 +0530)
The A23 SoC has the same dma engine as the A31 (sun6i), with a
reduced amount of endpoints and physical channels. Add the proper
config data and compatible string to support it.

A slight difference in sun8i is an undocumented register needs
to be toggled for dma to function.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Documentation/devicetree/bindings/dma/sun6i-dma.txt
drivers/dma/Kconfig
drivers/dma/sun6i-dma.c

index 3e145c1675b1ec1e5d7f123cf9dc5456fc72960b..9cdcba24d7c38937fc9b885995b21dd52b4dd8d1 100644 (file)
@@ -4,7 +4,7 @@ This driver follows the generic DMA bindings defined in dma.txt.
 
 Required properties:
 
-- compatible:  Must be "allwinner,sun6i-a31-dma"
+- compatible:  Must be "allwinner,sun6i-a31-dma" or "allwinner,sun8i-a23-dma"
 - reg:         Should contain the registers base address and length
 - interrupts:  Should contain a reference to the interrupt used by this device
 - clocks:      Should contain a reference to the parent AHB clock
index 607271a999a93cfac3be5a2b4f1a424abb71b2ec..aef8b9dd4db6e4385cf1ef2a8d240242aa48df21 100644 (file)
@@ -402,12 +402,12 @@ config XILINX_VDMA
 
 config DMA_SUN6I
        tristate "Allwinner A31 SoCs DMA support"
-       depends on MACH_SUN6I || COMPILE_TEST
+       depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
        depends on RESET_CONTROLLER
        select DMA_ENGINE
        select DMA_VIRTUAL_CHANNELS
        help
-         Support for the DMA engine for Allwinner A31 SoCs.
+         Support for the DMA engine first found in Allwinner A31 SoCs.
 
 config NBPFAXI_DMA
        tristate "Renesas Type-AXI NBPF DMA support"
index 531abbf68a9dda71d5888a2499d9dbb8f07f5d6f..f9f8f4d9915f6928532f53ef52296455cfc3b594 100644 (file)
 
 #define DMA_STAT               0x30
 
+/*
+ * sun8i specific registers
+ */
+#define SUN8I_DMA_GATE         0x20
+#define SUN8I_DMA_GATE_ENABLE  0x4
+
 /*
  * Channels specific registers
  */
@@ -878,8 +884,20 @@ static struct sun6i_dma_config sun6i_a31_dma_cfg = {
        .nr_max_vchans   = 53,
 };
 
+/*
+ * The A23 only has 8 physical channels, a maximum DRQ port id of 24,
+ * and a total of 37 usable source and destination endpoints.
+ */
+
+static struct sun6i_dma_config sun8i_a23_dma_cfg = {
+       .nr_max_channels = 8,
+       .nr_max_requests = 24,
+       .nr_max_vchans   = 37,
+};
+
 static struct of_device_id sun6i_dma_match[] = {
        { .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
+       { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
        { /* sentinel */ }
 };
 
@@ -1007,6 +1025,15 @@ static int sun6i_dma_probe(struct platform_device *pdev)
                goto err_dma_unregister;
        }
 
+       /*
+        * sun8i variant requires us to toggle a dma gating register,
+        * as seen in Allwinner's SDK. This register is not documented
+        * in the A23 user manual.
+        */
+       if (of_device_is_compatible(pdev->dev.of_node,
+                                   "allwinner,sun8i-a23-dma"))
+               writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);
+
        return 0;
 
 err_dma_unregister: