drm/i915: Add pipe enable/disable tracepoints

Add tracepoints for pipe enable/disable. We'll include the
frame/scanline counters for all pipes in these tracepoints to
help in diagnosing underruns and whatnot when enabling/disabling
pipes in parallel with plane updates/flips on another pipe.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190206204910.13965-2-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index d1c3d720157362da167396c04dfef84baf6a8d73..b3b4d78d1dc098d65a0d9e11aa2e360899aafc88 100644 (file)
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -16,6 +16,62 @@
 
 /* watermark/fifo updates */
 
+TRACE_EVENT(intel_pipe_enable,
+           TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe),
+           TP_ARGS(dev_priv, pipe),
+
+           TP_STRUCT__entry(
+                            __array(u32, frame, 3)
+                            __array(u32, scanline, 3)
+                            __field(enum pipe, pipe)
+                            ),
+
+           TP_fast_assign(
+                          enum pipe _pipe;
+                          for_each_pipe(dev_priv, _pipe) {
+                                  __entry->frame[_pipe] =
+                                          dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, _pipe);
+                                  __entry->scanline[_pipe] =
+                                          intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, _pipe));
+                          }
+                          __entry->pipe = pipe;
+                          ),
+
+           TP_printk("pipe %c enable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u",
+                     pipe_name(__entry->pipe),
+                     __entry->frame[PIPE_A], __entry->scanline[PIPE_A],
+                     __entry->frame[PIPE_B], __entry->scanline[PIPE_B],
+                     __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
+);
+
+TRACE_EVENT(intel_pipe_disable,
+           TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe),
+           TP_ARGS(dev_priv, pipe),
+
+           TP_STRUCT__entry(
+                            __array(u32, frame, 3)
+                            __array(u32, scanline, 3)
+                            __field(enum pipe, pipe)
+                            ),
+
+           TP_fast_assign(
+                          enum pipe _pipe;
+                          for_each_pipe(dev_priv, _pipe) {
+                                  __entry->frame[_pipe] =
+                                          dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, _pipe);
+                                  __entry->scanline[_pipe] =
+                                          intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, _pipe));
+                          }
+                          __entry->pipe = pipe;
+                          ),
+
+           TP_printk("pipe %c disable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u",
+                     pipe_name(__entry->pipe),
+                     __entry->frame[PIPE_A], __entry->scanline[PIPE_A],
+                     __entry->frame[PIPE_B], __entry->scanline[PIPE_B],
+                     __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
+);
+
 TRACE_EVENT(intel_pipe_crc,
            TP_PROTO(struct intel_crtc *crtc, const u32 *crcs),
            TP_ARGS(crtc, crcs),

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5e126234a70d7f97bd8e5782821999d45222df13..648de5ba6e07b4d4254f6a49487b0434ff7f3fd9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1821,6 +1821,8 @@ static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
                /* FIXME: assert CPU port conditions for SNB+ */
        }
 
+       trace_intel_pipe_enable(dev_priv, pipe);
+
        reg = PIPECONF(cpu_transcoder);
        val = I915_READ(reg);
        if (val & PIPECONF_ENABLE) {
@@ -1860,6 +1862,8 @@ static void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state)
         */
        assert_planes_disabled(crtc);
 
+       trace_intel_pipe_disable(dev_priv, pipe);
+
        reg = PIPECONF(cpu_transcoder);
        val = I915_READ(reg);
        if ((val & PIPECONF_ENABLE) == 0)