arm64: dts: sdm845: Set 'bi_tcxo' as ref clock of the DSI PHYs

Add 'bi_tcxo' as ref clock for the DSI PHYs, it was previously
hardcoded in the PLL 'driver' for the 10nm PHY.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Andy Gross <agross@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index dd67f9c5cb43e6d3186cde60511f903e7d951526..0d7dd5e3d9468d677c9ec81b6762d0a79ea7ce01 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -1985,8 +1985,9 @@ dsi0_phy: dsi-phy@ae94400 {
                                #clock-cells = <1>;
                                #phy-cells = <0>;
 
-                               clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>;
-                               clock-names = "iface";
+                               clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+                                        <&rpmhcc RPMH_CXO_CLK>;
+                               clock-names = "iface", "ref";
 
                                status = "disabled";
                        };
@@ -2051,8 +2052,9 @@ dsi1_phy: dsi-phy@ae96400 {
                                #clock-cells = <1>;
                                #phy-cells = <0>;
 
-                               clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>;
-                               clock-names = "iface";
+                               clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+                                        <&rpmhcc RPMH_CXO_CLK>;
+                               clock-names = "iface", "ref";
 
                                status = "disabled";
                        };