]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu: enable Doorbell support for Renoir (v2)
authorLeo Liu <leo.liu@amd.com>
Mon, 15 Jul 2019 14:14:17 +0000 (10:14 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 12 Aug 2019 17:47:50 +0000 (12:47 -0500)
Add VCN range aperture to NBIO 7.0

v2: rebase (Alex)

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c

index 73419fa381593b271f56b5479736e7c62def88db..74eecb768a82002c140196d80281016319ba3909 100644 (file)
@@ -91,6 +91,26 @@ static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instan
        WREG32(reg, doorbell_range);
 }
 
+static void nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
+                                        int doorbell_index, int instance)
+{
+       u32 reg = SOC15_REG_OFFSET(NBIO, 0, mmBIF_MMSCH0_DOORBELL_RANGE);
+
+       u32 doorbell_range = RREG32(reg);
+
+       if (use_doorbell) {
+               doorbell_range = REG_SET_FIELD(doorbell_range,
+                                              BIF_MMSCH0_DOORBELL_RANGE, OFFSET,
+                                              doorbell_index);
+               doorbell_range = REG_SET_FIELD(doorbell_range,
+                                              BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8);
+       } else
+               doorbell_range = REG_SET_FIELD(doorbell_range,
+                                              BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0);
+
+       WREG32(reg, doorbell_range);
+}
+
 static void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev,
                                               bool enable)
 {
@@ -282,6 +302,7 @@ const struct amdgpu_nbio_funcs nbio_v7_0_funcs = {
        .hdp_flush = nbio_v7_0_hdp_flush,
        .get_memsize = nbio_v7_0_get_memsize,
        .sdma_doorbell_range = nbio_v7_0_sdma_doorbell_range,
+       .vcn_doorbell_range = nbio_v7_0_vcn_doorbell_range,
        .enable_doorbell_aperture = nbio_v7_0_enable_doorbell_aperture,
        .enable_doorbell_selfring_aperture = nbio_v7_0_enable_doorbell_selfring_aperture,
        .ih_doorbell_range = nbio_v7_0_ih_doorbell_range,
index a8e92638a2e83973c653b59d2ecc9279635828a3..bd0580334f834828ee4ad0707a2c01f6c06f02b6 100644 (file)
@@ -81,6 +81,10 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
        adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3;
        adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5;
        adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
+       adev->doorbell_index.vcn.vcn_ring0_1 = AMDGPU_DOORBELL64_VCN0_1;
+       adev->doorbell_index.vcn.vcn_ring2_3 = AMDGPU_DOORBELL64_VCN2_3;
+       adev->doorbell_index.vcn.vcn_ring4_5 = AMDGPU_DOORBELL64_VCN4_5;
+       adev->doorbell_index.vcn.vcn_ring6_7 = AMDGPU_DOORBELL64_VCN6_7;
 
        adev->doorbell_index.first_non_cp = AMDGPU_DOORBELL64_FIRST_NON_CP;
        adev->doorbell_index.last_non_cp = AMDGPU_DOORBELL64_LAST_NON_CP;