]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
intel_pstate: set BYT MSR with wrmsrl_on_cpu()
authorJoe Konno <joe.konno@intel.com>
Tue, 12 May 2015 14:59:42 +0000 (07:59 -0700)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Tue, 12 May 2015 21:36:26 +0000 (23:36 +0200)
Commit 007bea098b86 (intel_pstate: Add setting voltage value for
baytrail P states.) introduced byt_set_pstate() with the assumption that
it would always be run by the CPU whose MSR is to be written by it.  It
turns out, however, that is not always the case in practice, so modify
byt_set_pstate() to enforce the MSR write done by it to always happen on
the right CPU.

Fixes: 007bea098b86 (intel_pstate: Add setting voltage value for baytrail P states.)
Signed-off-by: Joe Konno <joe.konno@intel.com>
Acked-by: Kristen Carlson Accardi <kristen@linux.intel.com>
Cc: 3.14+ <stable@vger.kernel.org> # 3.14+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/cpufreq/intel_pstate.c

index e833be4fd90336a25e5f02e88bc9caa322e757aa..2f329b45eacd0cf811287b19f74c8877370f9474 100644 (file)
@@ -537,7 +537,7 @@ static void byt_set_pstate(struct cpudata *cpudata, int pstate)
 
        val |= vid;
 
-       wrmsrl(MSR_IA32_PERF_CTL, val);
+       wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
 }
 
 #define BYT_BCLK_FREQS 5