]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM64: dts: marvell: enable USB host on Armada-8040-DB
authorGrzegorz Jaszczyk <jaz@semihalf.com>
Wed, 9 Aug 2017 14:44:37 +0000 (16:44 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Mon, 14 Aug 2017 14:30:43 +0000 (16:30 +0200)
Enable USB host on Armada-8040-DB by adding USB PHY nodes for the
following ports:
  - host 0 and 1 of CPM
  - host 0 of CPS

These PHY are enabled by lanes coming from regulators based on two
I2C expanders.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm64/boot/dts/marvell/armada-8040-db.dts

index 1e8f7242ed6ff97f7fe153ee7dc26fa1e950def4..0d7b2ae4661002e7443297f680511950c87bfd8f 100644 (file)
@@ -44,6 +44,7 @@
  * Device Tree file for Marvell Armada 8040 Development board platform
  */
 
+#include <dt-bindings/gpio/gpio.h>
 #include "armada-8040.dtsi"
 
 / {
@@ -59,6 +60,48 @@ memory@00000000 {
                device_type = "memory";
                reg = <0x0 0x0 0x0 0x80000000>;
        };
+
+       cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "cpm-usb3h0-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               enable-active-high;
+               gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
+       };
+
+       cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "cpm-usb3h1-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               enable-active-high;
+               gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
+       };
+
+       cpm_usb3_0_phy: cpm-usb3-0-phy {
+               compatible = "usb-nop-xceiv";
+               vcc-supply = <&cpm_reg_usb3_0_vbus>;
+       };
+
+       cpm_usb3_1_phy: cpm-usb3-1-phy {
+               compatible = "usb-nop-xceiv";
+               vcc-supply = <&cpm_reg_usb3_1_vbus>;
+       };
+
+       cps_reg_usb3_0_vbus: cps-usb3-0-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "cps-usb3h0-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               enable-active-high;
+               gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
+       };
+
+       cps_usb3_0_phy: cps-usb3-0-phy {
+               compatible = "usb-nop-xceiv";
+               vcc-supply = <&cps_reg_usb3_0_vbus>;
+       };
 };
 
 &i2c0 {
@@ -107,6 +150,25 @@ &cpm_pcie2 {
 &cpm_i2c0 {
        status = "okay";
        clock-frequency = <100000>;
+
+       /* U31 */
+       expander0: pca9555@21 {
+               compatible = "nxp,pca9555";
+               pinctrl-names = "default";
+               gpio-controller;
+               #gpio-cells = <2>;
+               reg = <0x21>;
+       };
+
+       /* U25 */
+       expander1: pca9555@25 {
+               compatible = "nxp,pca9555";
+               pinctrl-names = "default";
+               gpio-controller;
+               #gpio-cells = <2>;
+               reg = <0x25>;
+       };
+
 };
 
 /* CON4 on CP0 expansion */
@@ -116,11 +178,13 @@ &cpm_sata0 {
 
 /* CON9 on CP0 expansion */
 &cpm_usb3_0 {
+       usb-phy = <&cpm_usb3_0_phy>;
        status = "okay";
 };
 
 /* CON10 on CP0 expansion */
 &cpm_usb3_1 {
+       usb-phy = <&cpm_usb3_1_phy>;
        status = "okay";
 };
 
@@ -159,6 +223,7 @@ &cps_sata0 {
 
 /* CON9 on CP1 expansion */
 &cps_usb3_0 {
+       usb-phy = <&cps_usb3_0_phy>;
        status = "okay";
 };