arm64: dts: Add NAND DT nodes for Stingray SOC

This patch adds NAND controller DT Node and NAND chip DT
node for Stingray SOC and Stingray reference boards.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi
index 992944b8a448f9b1ef8b5c98d12796dc65120220..aad45a2b7931898bc80f3de6f3b0a470d172a1d2 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi
@@ -53,3 +53,18 @@ &memory { /* Default DRAM banks */
 &uart1 {
        status = "okay";
 };
+
+&nand {
+       status = "ok";
+       nandcs@0 {
+               compatible = "brcm,nandcs";
+               reg = <0>;
+               nand-ecc-mode = "hw";
+               nand-ecc-strength = <8>;
+               nand-ecc-step-size = <512>;
+               nand-bus-width = <16>;
+               brcm,nand-oob-sector-size = <16>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+       };
+};

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 722e362d6d220f59b94c8bdfff2daaed37cf4061..e8faa62bf3083406a3339b13fe3c872145bbf2fe 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -307,5 +307,18 @@ hwrng: hwrng@00220000 {
                        compatible = "brcm,iproc-rng200";
                        reg = <0x00220000 0x28>;
                };
+
+               nand: nand@00360000 {
+                       compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
+                       reg = <0x00360000 0x600>,
+                             <0x0050a408 0x600>,
+                             <0x00360f00 0x20>;
+                       reg-names = "nand", "iproc-idm", "iproc-ext";
+                       interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       brcm,nand-has-wp;
+                       status = "disabled";
+               };
        };
 };