]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: renesas: hihope-rzg2-ex: Let the board specific DT decide about pciec1
authorFabrizio Castro <fabrizio.castro@bp.renesas.com>
Fri, 4 Oct 2019 08:35:33 +0000 (09:35 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 10 Oct 2019 14:22:07 +0000 (16:22 +0200)
The plan for the HiHope RZ/G2N board is to enable pciec0 by default,
and use pciec1 physical interface for SATA (as SATA and PCIE1 share
the same physical interface), therefore move pciec1 enabling away
from hihope-rzg2-ex.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570178133-21532-8-git-send-email-fabrizio.castro@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts

index f9e7cf68a73945400acae1240f24cbf10c5c53fb..28fe17e3bc4e9c44becebbbd0d90ceaf390b36ba 100644 (file)
@@ -84,10 +84,6 @@ &pciec0 {
        status = "okay";
 };
 
-&pciec1 {
-       status = "okay";
-};
-
 &pfc {
        pinctrl-0 = <&scif_clk_pins>;
        pinctrl-names = "default";
index 6e33a3b2770670660feeef1ef1ab07e01ce28640..c754fca239d9a9024d32fcfd6bbd63c33e58e0ae 100644 (file)
@@ -13,3 +13,7 @@ / {
        compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m",
                     "renesas,r8a774a1";
 };
+
+&pciec1 {
+       status = "okay";
+};