]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ASoC: Intel: bxtn: Use DSP poll API to poll FW status
authorJeeja KP <jeeja.kp@intel.com>
Mon, 2 Jan 2017 04:20:03 +0000 (09:50 +0530)
committerMark Brown <broonie@kernel.org>
Fri, 6 Jan 2017 18:14:48 +0000 (18:14 +0000)
Use the optimized dsp_register_poll API to poll the DSP firmware
status register rather than open coding it.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/skylake/bxt-sst.c

index e4a382870132c18e505565ce763ac804b073b04d..15a063a403ccc28762abedb3e0124a6b1e70b78f 100644 (file)
@@ -151,23 +151,13 @@ static int sst_bxt_prepare_fw(struct sst_dsp *ctx,
        }
 
        /* Step 4: Wait for DONE Bit */
-       for (i = BXT_INIT_TIMEOUT; i > 0; --i) {
-               reg = sst_dsp_shim_read(ctx, SKL_ADSP_REG_HIPCIE);
-
-               if (reg & SKL_ADSP_REG_HIPCIE_DONE) {
-                       sst_dsp_shim_update_bits_forced(ctx,
-                                       SKL_ADSP_REG_HIPCIE,
+       ret = sst_dsp_register_poll(ctx, SKL_ADSP_REG_HIPCIE,
                                        SKL_ADSP_REG_HIPCIE_DONE,
-                                       SKL_ADSP_REG_HIPCIE_DONE);
-                       break;
-               }
-               mdelay(1);
-       }
-       if (!i) {
-               dev_info(ctx->dev, "Waiting for HIPCIE done, reg: 0x%x\n", reg);
-               sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_HIPCIE,
-                               SKL_ADSP_REG_HIPCIE_DONE,
-                               SKL_ADSP_REG_HIPCIE_DONE);
+                                       SKL_ADSP_REG_HIPCIE_DONE,
+                                       BXT_INIT_TIMEOUT, "HIPCIE Done");
+       if (ret < 0) {
+               dev_err(ctx->dev, "Timout for Purge Request%d\n", ret);
+               goto base_fw_load_failed;
        }
 
        /* Step 5: power down core1 */
@@ -182,19 +172,10 @@ static int sst_bxt_prepare_fw(struct sst_dsp *ctx,
        skl_ipc_op_int_enable(ctx);
 
        /* Step 7: Wait for ROM init */
-       for (i = BXT_INIT_TIMEOUT; i > 0; --i) {
-               if (SKL_FW_INIT ==
-                               (sst_dsp_shim_read(ctx, BXT_ADSP_FW_STATUS) &
-                               SKL_FW_STS_MASK)) {
-
-                       dev_info(ctx->dev, "ROM loaded, continue FW loading\n");
-                       break;
-               }
-               mdelay(1);
-       }
-       if (!i) {
-               dev_err(ctx->dev, "Timeout for ROM init, HIPCIE: 0x%x\n", reg);
-               ret = -EIO;
+       ret = sst_dsp_register_poll(ctx, BXT_ADSP_FW_STATUS, SKL_FW_STS_MASK,
+                       SKL_FW_INIT, BXT_INIT_TIMEOUT, "ROM Load");
+       if (ret < 0) {
+               dev_err(ctx->dev, "Timeout for ROM init, ret:%d\n", ret);
                goto base_fw_load_failed;
        }