]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: add comments about EC exception levels
authorKristina Martsenko <kristina.martsenko@arm.com>
Fri, 7 Dec 2018 18:39:19 +0000 (18:39 +0000)
committerWill Deacon <will.deacon@arm.com>
Thu, 13 Dec 2018 16:42:45 +0000 (16:42 +0000)
To make it clear which exceptions can't be taken to EL1 or EL2, add
comments next to the ESR_ELx_EC_* macro definitions.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/esr.h

index 676de2ec1762c2db5cb87b16137d25e6dab527ff..23602a0083ad295f8e1ed44aa726ea52b19b2e69 100644 (file)
 #define ESR_ELx_EC_CP14_MR     (0x05)
 #define ESR_ELx_EC_CP14_LS     (0x06)
 #define ESR_ELx_EC_FP_ASIMD    (0x07)
-#define ESR_ELx_EC_CP10_ID     (0x08)
+#define ESR_ELx_EC_CP10_ID     (0x08)  /* EL2 only */
 /* Unallocated EC: 0x09 - 0x0B */
 #define ESR_ELx_EC_CP14_64     (0x0C)
 /* Unallocated EC: 0x0d */
 #define ESR_ELx_EC_ILL         (0x0E)
 /* Unallocated EC: 0x0F - 0x10 */
 #define ESR_ELx_EC_SVC32       (0x11)
-#define ESR_ELx_EC_HVC32       (0x12)
-#define ESR_ELx_EC_SMC32       (0x13)
+#define ESR_ELx_EC_HVC32       (0x12)  /* EL2 only */
+#define ESR_ELx_EC_SMC32       (0x13)  /* EL2 and above */
 /* Unallocated EC: 0x14 */
 #define ESR_ELx_EC_SVC64       (0x15)
-#define ESR_ELx_EC_HVC64       (0x16)
-#define ESR_ELx_EC_SMC64       (0x17)
+#define ESR_ELx_EC_HVC64       (0x16)  /* EL2 and above */
+#define ESR_ELx_EC_SMC64       (0x17)  /* EL2 and above */
 #define ESR_ELx_EC_SYS64       (0x18)
 #define ESR_ELx_EC_SVE         (0x19)
 /* Unallocated EC: 0x1A - 0x1E */
-#define ESR_ELx_EC_IMP_DEF     (0x1f)
+#define ESR_ELx_EC_IMP_DEF     (0x1f)  /* EL3 only */
 #define ESR_ELx_EC_IABT_LOW    (0x20)
 #define ESR_ELx_EC_IABT_CUR    (0x21)
 #define ESR_ELx_EC_PC_ALIGN    (0x22)
@@ -68,7 +68,7 @@
 /* Unallocated EC: 0x36 - 0x37 */
 #define ESR_ELx_EC_BKPT32      (0x38)
 /* Unallocated EC: 0x39 */
-#define ESR_ELx_EC_VECTOR32    (0x3A)
+#define ESR_ELx_EC_VECTOR32    (0x3A)  /* EL2 only */
 /* Unallocted EC: 0x3B */
 #define ESR_ELx_EC_BRK64       (0x3C)
 /* Unallocated EC: 0x3D - 0x3F */