]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)
authorPeter Rosin <peda@axentia.se>
Thu, 24 Nov 2016 20:45:18 +0000 (21:45 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 25 Nov 2016 13:40:06 +0000 (14:40 +0100)
All other registers on these chips are 8-bit, but reg_sense is 16-bits
and therefore needs to be moved down one notch.
This was apparently overlooked in the conversion to regmap, which only
updated the register locations for the 16-bit chips.

Fixes: 6489677f86c3 ("pinctrl-sx150x: Replace sx150x_*_cfg by means of regmap API")
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-sx150x.c

index f9e559e22537ad8eb2acf2bdaa73c0f40d79ab5b..a19c814843aa6292472c20d3528030564f9efea9 100644 (file)
@@ -156,7 +156,7 @@ static const struct sx150x_device_data sx1508q_device_data = {
        .reg_data       = 0x08,
        .reg_irq_mask   = 0x09,
        .reg_irq_src    = 0x0c,
-       .reg_sense      = 0x0b,
+       .reg_sense      = 0x0a,
        .pri.x789 = {
                .reg_drain      = 0x05,
                .reg_polarity   = 0x06,
@@ -221,7 +221,7 @@ static const struct sx150x_device_data sx1502q_device_data = {
        .reg_data       = 0x00,
        .reg_irq_mask   = 0x05,
        .reg_irq_src    = 0x08,
-       .reg_sense      = 0x07,
+       .reg_sense      = 0x06,
        .pri.x123 = {
                .reg_pld_mode   = 0x10,
                .reg_pld_table0 = 0x11,