]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
pinctrl: mediatek: add ies register support to pinctrl-mtk-common-v2.c
authorSean Wang <sean.wang@mediatek.com>
Sat, 8 Sep 2018 11:07:26 +0000 (19:07 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 18 Sep 2018 21:53:00 +0000 (14:53 -0700)
Certain SoCs have to program an extra IES register to configure input
enabled mode so that we add it in the existing path as an option.

Signed-off-by: Ryder.Lee <ryder.lee@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/mediatek/pinctrl-moore.c
drivers/pinctrl/mediatek/pinctrl-mt7622.c
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h

index 4009329597274d097e7eda7b020351e495ba3970..219cfce6d3d990676beeddbbac829266032608e1 100644 (file)
@@ -244,15 +244,27 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
                                               MTK_DISABLE);
                        if (err)
                                goto err;
-                       /* else: fall through */
+
+                       err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_DIR,
+                                              MTK_OUTPUT);
+                       if (err)
+                               goto err;
+                       break;
                case PIN_CONFIG_INPUT_ENABLE:
-               case PIN_CONFIG_SLEW_RATE:
-                       reg = (param == PIN_CONFIG_SLEW_RATE) ?
-                              PINCTRL_PIN_REG_SR : PINCTRL_PIN_REG_DIR;
 
-                       arg = (param == PIN_CONFIG_INPUT_ENABLE) ? 0 :
-                             (param == PIN_CONFIG_OUTPUT_ENABLE) ? 1 : arg;
-                       err = mtk_hw_set_value(hw, pin, reg, arg);
+                       if (hw->soc->ies_present) {
+                               mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_IES,
+                                                MTK_ENABLE);
+                       }
+
+                       err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_DIR,
+                                              MTK_INPUT);
+                       if (err)
+                               goto err;
+                       break;
+               case PIN_CONFIG_SLEW_RATE:
+                       err = mtk_hw_set_value(hw, pin, PINCTRL_PIN_REG_SR,
+                                              arg);
                        if (err)
                                goto err;
 
index 9a5b13a2826ebe1978d093c2373e4c11ffd3403b..9ac36ab3678cdece082d6a6473eb95163ff524a7 100644 (file)
@@ -767,6 +767,7 @@ static const struct mtk_pin_soc mt7622_data = {
        .eint_hw = &mt7622_eint_hw,
        .gpio_m = 1,
        .eint_m = 1,
+       .ies_present = false,
        .bias_disable_set = mtk_pinconf_bias_disable_set,
        .bias_disable_get = mtk_pinconf_bias_disable_get,
        .bias_set = mtk_pinconf_bias_set,
index ce364a1a28a61785a6edbe3f976b089d04f8ee73..b01dbd831ef77886d48442170215959f7bd96bbe 100644 (file)
@@ -54,6 +54,7 @@ enum {
        PINCTRL_PIN_REG_PUPD,
        PINCTRL_PIN_REG_R0,
        PINCTRL_PIN_REG_R1,
+       PINCTRL_PIN_REG_IES,
        PINCTRL_PIN_REG_MAX,
 };
 
@@ -151,6 +152,7 @@ struct mtk_pin_soc {
        /* Specific parameters per SoC */
        u8                              gpio_m;
        u8                              eint_m;
+       bool                            ies_present;
 
        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,