drm/amd/display: fix not calling ppsmu to trigger PME

[why]
dcn20_clk_mgr_construct was not initializing pp_smu, and PME call gets
filtered out by the null check

[how]
initialize pp_smu dcn20_clk_mgr_construct

Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
index e9a7a7af11dfbcc4389013a197d68ab352e2e072..4842c91771d8057664236833b4135e9fab47e30f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
@@ -346,6 +346,8 @@ void dcn20_clk_mgr_construct(
 
        clk_mgr->base.dprefclk_khz = 700000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved
 
+       clk_mgr->pp_smu = pp_smu;
+
        if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) {
                dcn2_funcs.update_clocks = dcn2_update_clocks_fpga;
                clk_mgr->dentist_vco_freq_khz = 3850000;