ARM: dts: rockchip: add more iommu nodes on rk3288

Add IEP/ISP/VPU/HEVC iommu nodes

Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index b1995c0efb136ecffc76fcaad055fc95ea0335ac..c0c04e99e1597a076122cce54108b64e596aa0ab 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -953,6 +953,25 @@ crypto: cypto-controller@ff8a0000 {
                status = "okay";
        };
 
+       iep_mmu: iommu@ff900800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff900800 0x0 0x40>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "iep_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
+       isp_mmu: iommu@ff914000 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
+               interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "isp_mmu";
+               #iommu-cells = <0>;
+               rockchip,disable-mmu-reset;
+               status = "disabled";
+       };
+
        vopb: vop@ff930000 {
                compatible = "rockchip,rk3288-vop";
                reg = <0x0 0xff930000 0x0 0x19c>;
@@ -1126,6 +1145,24 @@ hdmi_in_vopl: endpoint@1 {
                };
        };
 
+       vpu_mmu: iommu@ff9a0800 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff9a0800 0x0 0x100>;
+               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vpu_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
+       hevc_mmu: iommu@ff9c0440 {
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
+               interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "hevc_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        gpu: mali@ffa30000 {
                compatible = "rockchip,rk3288-mali", "arm,mali-t760", "arm,mali-midgard";
                reg = <0x0 0xffa30000 0x0 0x10000>;