]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu: Rename amdgpu_display_framebuffer_domains()
authorSamuel Li <Samuel.Li@amd.com>
Wed, 18 Apr 2018 19:06:02 +0000 (15:06 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 May 2018 18:43:43 +0000 (13:43 -0500)
It returns supported domains for display, and domains actually used are to be
decided later when pinned.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index b83ae998fe2764fd54361f0103a80190af4ed30a..76ee8e04ff1172b81c18d478b2738f6149661f5d 100644 (file)
@@ -189,7 +189,7 @@ int amdgpu_display_crtc_page_flip_target(struct drm_crtc *crtc,
                goto cleanup;
        }
 
-       r = amdgpu_bo_pin(new_abo, amdgpu_display_framebuffer_domains(adev), &base);
+       r = amdgpu_bo_pin(new_abo, amdgpu_display_supported_domains(adev), &base);
        if (unlikely(r != 0)) {
                DRM_ERROR("failed to pin new abo buffer before flip\n");
                goto unreserve;
@@ -484,7 +484,7 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
        .create_handle = drm_gem_fb_create_handle,
 };
 
-uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev)
+uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev)
 {
        uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
 
index 2b11d808f297793dc19436ca41b6ebc5c34394c6..f66e3e3fef0a5af4900ad1171d8708ce6fbf2ef8 100644 (file)
@@ -23,7 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
-uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev);
+uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_display_user_framebuffer_create(struct drm_device *dev,
                                       struct drm_file *file_priv,
index ff89e84b34ce89cc8ee262ca2b0608a049fb67b4..bc5fd8ebab5dd5ac693f47da46be75fecaff8a62 100644 (file)
@@ -137,7 +137,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
        /* need to align pitch with crtc limits */
        mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
                                                  fb_tiled);
-       domain = amdgpu_display_framebuffer_domains(adev);
+       domain = amdgpu_display_supported_domains(adev);
 
        height = ALIGN(mode_cmd->height, 8);
        size = mode_cmd->pitches[0] * height;
index 713417b6d15d776255729b6a6ebef1dadc328202..4683626b065ff2cb06473ad8349bbaa6148cd68f 100644 (file)
@@ -215,7 +215,7 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
        struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
        struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
        struct ttm_operation_ctx ctx = { true, false };
-       u32 domain = amdgpu_display_framebuffer_domains(adev);
+       u32 domain = amdgpu_display_supported_domains(adev);
        int ret;
        bool reads = (direction == DMA_BIDIRECTIONAL ||
                      direction == DMA_FROM_DEVICE);
index 2368ade4bae02cb402a7b156a61ceebe49a7f5e5..28d8c08efeebea992fc176a674f26f8c21bc3657 100644 (file)
@@ -3049,12 +3049,11 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
                return r;
 
        if (plane->type != DRM_PLANE_TYPE_CURSOR)
-               domain = amdgpu_display_framebuffer_domains(adev);
+               domain = amdgpu_display_supported_domains(adev);
        else
                domain = AMDGPU_GEM_DOMAIN_VRAM;
 
        r = amdgpu_bo_pin(rbo, domain, &afb->address);
-
        amdgpu_bo_unreserve(rbo);
 
        if (unlikely(r != 0)) {