arm64: dts: marvell: use reworked NAND controller driver on Armada 7K

Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.

Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index c470ea89a86413a7944a684f3e4df7070fd64956..d6bec058a30a2c847115678e3721dfbf6cdb09d1 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -123,36 +123,48 @@ expander0: pca9555@21 {
        };
 };
 
-&cp0_nand {
+&cp0_nand_controller {
        /*
         * SPI on CPM and NAND have common pins on this board. We can
-        * use only one at a time. To enable the NAND (whihch will
+        * use only one at a time. To enable the NAND (which will
         * disable the SPI), the "status = "okay";" line have to be
         * added here.
         */
-       num-cs = <1>;
        pinctrl-0 = <&nand_pins>, <&nand_rb>;
        pinctrl-names = "default";
-       nand-ecc-strength = <4>;
-       nand-ecc-step-size = <512>;
-       marvell,nand-enable-arbiter;
-       nand-on-flash-bbt;
-
-       partition@0 {
-               label = "U-Boot";
-               reg = <0 0x200000>;
-       };
-       partition@200000 {
-               label = "Linux";
-               reg = <0x200000 0xe00000>;
-       };
-       partition@1000000 {
-               label = "Filesystem";
-               reg = <0x1000000 0x3f000000>;
+
+       nand@0 {
+               reg = <0>;
+               label = "pxa3xx_nand-0";
+               nand-rb = <0>;
+               nand-on-flash-bbt;
+               nand-ecc-strength = <4>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "U-Boot";
+                               reg = <0 0x200000>;
+                       };
+
+                       partition@200000 {
+                               label = "Linux";
+                               reg = <0x200000 0xe00000>;
+                       };
+
+                       partition@1000000 {
+                               label = "Filesystem";
+                               reg = <0x1000000 0x3f000000>;
+                       };
+
+               };
        };
 };
 
-
 &cp0_spi1 {
        status = "okay";
 

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index 215cdc65447cd96ec39e7b0923d6faec12f0dc9a..d3f422f8f086cf69674e91b78ded3d2042800ec1 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -337,17 +337,17 @@ CP110_LABEL(uart3): serial@702300 {
                        status = "disabled";
                };
 
-               CP110_LABEL(nand): nand@720000 {
+               CP110_LABEL(nand_controller): nand@720000 {
                        /*
                        * Due to the limitation of the pins available
                        * this controller is only usable on the CPM
                        * for A7K and on the CPS for A8K.
                        */
-                       compatible = "marvell,armada-8k-nand",
-                       "marvell,armada370-nand";
+                       compatible = "marvell,armada-8k-nand-controller",
+                               "marvell,armada370-nand-controller";
                        reg = <0x720000 0x54>;
                        #address-cells = <1>;
-                       #size-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&CP110_LABEL(clk) 1 2>;
                        marvell,system-controller = <&CP110_LABEL(syscon0)>;