drm/i915/icl: Fix combo PHY uninit

BSpec says to clear the comp init HW flag too during combo PHY uninit,
so do that. The lack of this could badly interact with the PHY reinit
after a DC6/9 transition at least, where (after a follow-up patch fixing
the init code) we'd skip the initialization incorrectly due to this flag
being set.

BSpec: 21257
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181106160621.23057-2-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index cda73bf05ed903ea146bc2d7c7139e30687c2aac..bd05d30733a4369426032d3d516c53c1298b490b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3668,6 +3668,10 @@ void icl_display_core_uninit(struct drm_i915_private *dev_priv)
                val = I915_READ(ICL_PHY_MISC(port));
                val |= ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN;
                I915_WRITE(ICL_PHY_MISC(port), val);
+
+               val = I915_READ(ICL_PORT_COMP_DW0(port));
+               val &= ~COMP_INIT;
+               I915_WRITE(ICL_PORT_COMP_DW0(port), val);
        }
 }