arm64: dts: uniphier: increase register region size of sysctrl node

The System Control node has 0x10000 byte of registers.  The current
reg size must be expanded to use the cpufreq driver because the
registers controlling CPU frequency are located at offset 0x8000.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 17bc4b3599123fcf9a8da65248888d209cfd4fb1..73e0acfd4f98db30c33c3aff29cb87047d9b0169 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -323,7 +323,7 @@ gic: interrupt-controller@5fe00000 {
                sysctrl@61840000 {
                        compatible = "socionext,uniphier-ld11-sysctrl",
                                     "simple-mfd", "syscon";
-                       reg = <0x61840000 0x4000>;
+                       reg = <0x61840000 0x10000>;
 
                        sys_clk: clock {
                                compatible = "socionext,uniphier-ld11-clock";

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index c8ebe7e5280984dfcdfd4909fe5f8b0c21db854d..eaf260823084f2ccb0e0a737586e07546f2ac3c9 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -312,7 +312,7 @@ gic: interrupt-controller@5fe00000 {
                sysctrl@61840000 {
                        compatible = "socionext,uniphier-sysctrl",
                                     "simple-mfd", "syscon";
-                       reg = <0x61840000 0x4000>;
+                       reg = <0x61840000 0x10000>;
 
                        sys_clk: clock {
                                compatible = "socionext,uniphier-ld20-clock";