MIPS: Octeon: Watchdog registers for 70xx, 73xx, 78xx, F75xx.

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-watchdog@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17208/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/octeon/cvmx-ciu-defs.h b/arch/mips/include/asm/octeon/cvmx-ciu-defs.h
index 0dd0e40c96d4d076c3cc51a27f28c33b86bb0edd..6e61792d9248b4af91b0e64978205c463a24aa49 100644 (file)
--- a/arch/mips/include/asm/octeon/cvmx-ciu-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-ciu-defs.h
@@ -128,6 +128,7 @@ static inline uint64_t CVMX_CIU_PP_POKEX(unsigned long offset)
        case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
        case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
        case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+       case OCTEON_CN70XX & OCTEON_FAMILY_MASK:
                return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
        case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
        case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
@@ -143,6 +144,10 @@ static inline uint64_t CVMX_CIU_PP_POKEX(unsigned long offset)
                return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
        case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
                return CVMX_ADD_IO_SEG(0x0001070100100200ull) + (offset) * 8;
+       case OCTEON_CNF75XX & OCTEON_FAMILY_MASK:
+       case OCTEON_CN73XX & OCTEON_FAMILY_MASK:
+       case OCTEON_CN78XX & OCTEON_FAMILY_MASK:
+               return CVMX_ADD_IO_SEG(0x0001010000030000ull) + (offset) * 8;
        }
        return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
 }
@@ -180,6 +185,7 @@ static inline uint64_t CVMX_CIU_WDOGX(unsigned long offset)
        case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
        case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
        case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+       case OCTEON_CN70XX & OCTEON_FAMILY_MASK:
                return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
        case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
        case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
@@ -195,6 +201,10 @@ static inline uint64_t CVMX_CIU_WDOGX(unsigned long offset)
                return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
        case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
                return CVMX_ADD_IO_SEG(0x0001070100100000ull) + (offset) * 8;
+       case OCTEON_CNF75XX & OCTEON_FAMILY_MASK:
+       case OCTEON_CN73XX & OCTEON_FAMILY_MASK:
+       case OCTEON_CN78XX & OCTEON_FAMILY_MASK:
+               return CVMX_ADD_IO_SEG(0x0001010000020000ull) + (offset) * 8;
        }
        return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
 }