nios2: Fix update_mmu_cache preload the TLB with the new PTE

There is a bug in the TLB preload caused by the pid not being
shifted to the correct location in tlbmisc register.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>

diff --git a/arch/nios2/mm/tlb.c b/arch/nios2/mm/tlb.c
index af871188556917d7bb777f2ebf4dec3d66379c96..7fea59e53f94a25bab88851b4df8599727d23cb0 100644 (file)
--- a/arch/nios2/mm/tlb.c
+++ b/arch/nios2/mm/tlb.c
@@ -70,7 +70,8 @@ static void replace_tlb_one_pid(unsigned long addr, unsigned long mmu_pid, unsig
                if (pid != mmu_pid)
                        continue;
 
-               tlbmisc = mmu_pid | TLBMISC_WE | (way << TLBMISC_WAY_SHIFT);
+               tlbmisc = (mmu_pid << TLBMISC_PID_SHIFT) | TLBMISC_WE |
+                         (way << TLBMISC_WAY_SHIFT);
                WRCTL(CTL_TLBMISC, tlbmisc);
                if (tlbacc == 0)
                        WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));