arm64: compat: Workaround Neoverse-N1 #1542419 for compat user-space

Compat user-space is unable to perform ICIMVAU instructions from
user-space. Instead it uses a compat-syscall. Add the workaround for
Neoverse-N1 #1542419 to this code path.

Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/kernel/sys_compat.c b/arch/arm64/kernel/sys_compat.c
index f1cb649594271c09e7b35e58d7669c1dbe2eea87..c9fb02927d3e5cbd3efe12061fc63035fe9a656e 100644 (file)
--- a/arch/arm64/kernel/sys_compat.c
+++ b/arch/arm64/kernel/sys_compat.c
@@ -8,6 +8,7 @@
  */
 
 #include <linux/compat.h>
+#include <linux/cpufeature.h>
 #include <linux/personality.h>
 #include <linux/sched.h>
 #include <linux/sched/signal.h>
@@ -17,6 +18,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/system_misc.h>
+#include <asm/tlbflush.h>
 #include <asm/unistd.h>
 
 static long
@@ -30,6 +32,15 @@ __do_compat_cache_op(unsigned long start, unsigned long end)
                if (fatal_signal_pending(current))
                        return 0;
 
+               if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) {
+                       /*
+                        * The workaround requires an inner-shareable tlbi.
+                        * We pick the reserved-ASID to minimise the impact.
+                        */
+                       __tlbi(aside1is, 0);
+                       dsb(ish);
+               }
+
                ret = __flush_cache_user_range(start, start + chunk);
                if (ret)
                        return ret;