]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: sun6i: dt: Fix mod0 compatible
authorMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 24 Feb 2014 16:29:06 +0000 (17:29 +0100)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 28 Feb 2014 11:04:53 +0000 (12:04 +0100)
The module 0 clock compatibles were changed between the time the patch was sent
and it was merged. Update the compatibles.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
arch/arm/boot/dts/sun6i-a31.dtsi

index af6f87c4e1c7667d98c5cffef70dfef8c793e0c5..42f310a925c4eaac919b3ed4e063ede7150b1b7f 100644 (file)
@@ -200,7 +200,7 @@ apb2_gates: clk@01c2006c {
 
                spi0_clk: clk@01c200a0 {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-mod0-clk";
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
                        reg = <0x01c200a0 0x4>;
                        clocks = <&osc24M>, <&pll6>;
                        clock-output-names = "spi0";
@@ -208,7 +208,7 @@ spi0_clk: clk@01c200a0 {
 
                spi1_clk: clk@01c200a4 {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-mod0-clk";
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
                        reg = <0x01c200a4 0x4>;
                        clocks = <&osc24M>, <&pll6>;
                        clock-output-names = "spi1";
@@ -216,7 +216,7 @@ spi1_clk: clk@01c200a4 {
 
                spi2_clk: clk@01c200a8 {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-mod0-clk";
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
                        reg = <0x01c200a8 0x4>;
                        clocks = <&osc24M>, <&pll6>;
                        clock-output-names = "spi2";
@@ -224,7 +224,7 @@ spi2_clk: clk@01c200a8 {
 
                spi3_clk: clk@01c200ac {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-mod0-clk";
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
                        reg = <0x01c200ac 0x4>;
                        clocks = <&osc24M>, <&pll6>;
                        clock-output-names = "spi3";