]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236
authorChris Packham <chris.packham@alliedtelesis.co.nz>
Thu, 2 Mar 2017 22:42:39 +0000 (11:42 +1300)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Wed, 8 Mar 2017 08:52:55 +0000 (09:52 +0100)
The Marvell 98dx3236 SoC only has a single PCIe x1 interface. The "Port
0.1 MEM" range was errantly kept when creating a specific dts for the
SoC.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm/boot/dts/armada-xp-98dx3236.dtsi

index 3f3ec9e1f8af68b0c69d01fd3d03704c27196604..84cc232a29e9e3c00f779da43174fa637e52ca4f 100644 (file)
@@ -105,8 +105,7 @@ pciec: pcie-controller@82000000 {
                        ranges =
                               <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
                                0x82000000 0x1 0       MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
-                               0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
-                               0x82000000 0x2 0       MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */>;
+                               0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */>;
 
                        pcie1: pcie@1,0 {
                                device_type = "pci";