]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu: add amdgpu_gmc_get_pde_for_bo helper v2
authorChristian König <christian.koenig@amd.com>
Wed, 22 Aug 2018 12:11:19 +0000 (14:11 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 27 Aug 2018 20:19:42 +0000 (15:19 -0500)
Helper to get the PDE for a PD/PT.

v2: improve documentation

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

index 36058feac64f2c5ba8ea3ab7ecd0a6e2005ad9f3..a249931ef51210b9cbe5c4c2e2bbc4ded2155f2a 100644 (file)
 
 #include "amdgpu.h"
 
+/**
+ * amdgpu_gmc_get_pde_for_bo - get the PDE for a BO
+ *
+ * @bo: the BO to get the PDE for
+ * @level: the level in the PD hirarchy
+ * @addr: resulting addr
+ * @flags: resulting flags
+ *
+ * Get the address and flags to be used for a PDE (Page Directory Entry).
+ */
+void amdgpu_gmc_get_pde_for_bo(struct amdgpu_bo *bo, int level,
+                              uint64_t *addr, uint64_t *flags)
+{
+       struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
+       struct ttm_dma_tt *ttm;
+
+       switch (bo->tbo.mem.mem_type) {
+       case TTM_PL_TT:
+               ttm = container_of(bo->tbo.ttm, struct ttm_dma_tt, ttm);
+               *addr = ttm->dma_address[0];
+               break;
+       case TTM_PL_VRAM:
+               *addr = amdgpu_bo_gpu_offset(bo);
+               break;
+       default:
+               *addr = 0;
+               break;
+       }
+       *flags = amdgpu_ttm_tt_pde_flags(bo->tbo.ttm, &bo->tbo.mem);
+       amdgpu_gmc_get_vm_pde(adev, level, addr, flags);
+}
+
 /**
  * amdgpu_gmc_pd_addr - return the address of the root directory
  *
@@ -35,13 +67,14 @@ uint64_t amdgpu_gmc_pd_addr(struct amdgpu_bo *bo)
        struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
        uint64_t pd_addr;
 
-       pd_addr = amdgpu_bo_gpu_offset(bo);
        /* TODO: move that into ASIC specific code */
        if (adev->asic_type >= CHIP_VEGA10) {
                uint64_t flags = AMDGPU_PTE_VALID;
 
-               amdgpu_gmc_get_vm_pde(adev, -1, &pd_addr, &flags);
+               amdgpu_gmc_get_pde_for_bo(bo, -1, &pd_addr, &flags);
                pd_addr |= flags;
+       } else {
+               pd_addr = amdgpu_bo_gpu_offset(bo);
        }
        return pd_addr;
 }
index 1c6974a33467ef5a50a6aac75bce360bf52568bc..85030c04c443c61b1b675566e92eec6a879c6a42 100644 (file)
@@ -133,6 +133,8 @@ static inline bool amdgpu_gmc_vram_full_visible(struct amdgpu_gmc *gmc)
        return (gmc->real_vram_size == gmc->visible_vram_size);
 }
 
+void amdgpu_gmc_get_pde_for_bo(struct amdgpu_bo *bo, int level,
+                              uint64_t *addr, uint64_t *flags);
 uint64_t amdgpu_gmc_pd_addr(struct amdgpu_bo *bo);
 
 #endif
index eb08a03b82a0954f64b7c0ade31a93736d9ab748..2f304f9dd5430a4366e5727ebc39fab67da7748a 100644 (file)
@@ -1428,13 +1428,14 @@ bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm)
 }
 
 /**
- * amdgpu_ttm_tt_pte_flags - Compute PTE flags for ttm_tt object
+ * amdgpu_ttm_tt_pde_flags - Compute PDE flags for ttm_tt object
  *
  * @ttm: The ttm_tt object to compute the flags for
  * @mem: The memory registry backing this ttm_tt object
+ *
+ * Figure out the flags to use for a VM PDE (Page Directory Entry).
  */
-uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
-                                struct ttm_mem_reg *mem)
+uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_mem_reg *mem)
 {
        uint64_t flags = 0;
 
@@ -1448,6 +1449,22 @@ uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
                        flags |= AMDGPU_PTE_SNOOPED;
        }
 
+       return flags;
+}
+
+/**
+ * amdgpu_ttm_tt_pte_flags - Compute PTE flags for ttm_tt object
+ *
+ * @ttm: The ttm_tt object to compute the flags for
+ * @mem: The memory registry backing this ttm_tt object
+
+ * Figure out the flags to use for a VM PTE (Page Table Entry).
+ */
+uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
+                                struct ttm_mem_reg *mem)
+{
+       uint64_t flags = amdgpu_ttm_tt_pde_flags(ttm, mem);
+
        flags |= adev->gart.gart_pte_flags;
        flags |= AMDGPU_PTE_READABLE;
 
index 8b3cc6687769eef8b24fb4d11b40cd518d7f442e..fe8f276e9811c02e1bdee63c136e7bcf81afc876 100644 (file)
@@ -116,6 +116,7 @@ bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
                                       int *last_invalidated);
 bool amdgpu_ttm_tt_userptr_needs_pages(struct ttm_tt *ttm);
 bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
+uint64_t amdgpu_ttm_tt_pde_flags(struct ttm_tt *ttm, struct ttm_mem_reg *mem);
 uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
                                 struct ttm_mem_reg *mem);
 
index f78be285d29652c5339e5bebabb582d4894ae1b8..f17fb3c63f432ba147266665a53701c00d2614cc 100644 (file)
@@ -1014,9 +1014,7 @@ static void amdgpu_vm_update_pde(struct amdgpu_pte_update_params *params,
                pbo = pbo->parent;
 
        level += params->adev->vm_manager.root_level;
-       pt = amdgpu_bo_gpu_offset(entry->base.bo);
-       flags = AMDGPU_PTE_VALID;
-       amdgpu_gmc_get_vm_pde(params->adev, level, &pt, &flags);
+       amdgpu_gmc_get_pde_for_bo(entry->base.bo, level, &pt, &flags);
        pde = (entry - parent->entries) * 8;
        if (bo->shadow)
                params->func(params, bo->shadow, pde, pt, 1, 0, flags);