clk: tegra: Reimplement SOR clock on Tegra124

In order to allow the display driver to deal uniformly with all SOR
generations, implement the SOR clocks in a way that is compatible with
Tegra186 and later.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 7d231529c3a581bdcc06a75b7f2b0611ea6eb1f0..b3110d5b5a6cc4c5d29149108915a88be6645467 100644 (file)
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -1005,20 +1005,24 @@ static struct tegra_devclk devclks[] __initdata = {
        { .con_id = "hda2hdmi", .dt_id = TEGRA124_CLK_HDA2HDMI },
 };
 
-static const char *mux_pllp_pllm_plld_plla_pllc_plld2_clkm[] = {
-       "pll_p", "pll_m", "pll_d_out0", "pll_a_out0", "pll_c",
-       "pll_d2_out0", "clk_m"
+static const char * const sor0_parents[] = {
+       "pll_p_out0", "pll_m_out0", "pll_d_out0", "pll_a_out0", "pll_c_out0",
+       "pll_d2_out0", "clk_m",
 };
-#define mux_pllp_pllm_plld_plla_pllc_plld2_clkm_idx NULL
 
-static const char *mux_clkm_plldp_sor0out[] = {
-       "clk_m", "pll_dp", "sor0_out",
+static const char * const sor0_out_parents[] = {
+       "clk_m", "sor0_pad_clkout",
 };
-#define mux_clkm_plldp_sor0out_idx NULL
 
 static struct tegra_periph_init_data tegra124_periph[] = {
-       MUX8_NOGATE_LOCK("sor0_out", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_SOR0, tegra_clk_sor0_out, &sor0_lock),
-       NODIV("sor0", mux_clkm_plldp_sor0out, CLK_SOURCE_SOR0, 14, 3, 182, 0, tegra_clk_sor0, &sor0_lock),
+       TEGRA_INIT_DATA_TABLE("sor0", NULL, NULL, sor0_parents,
+                             CLK_SOURCE_SOR0, 29, 0x7, 0, 0, 0, 0,
+                             0, 182, 0, tegra_clk_sor0, NULL, 0,
+                             &sor0_lock),
+       TEGRA_INIT_DATA_TABLE("sor0_out", NULL, NULL, sor0_out_parents,
+                             CLK_SOURCE_SOR0, 14, 0x1, 0, 0, 0, 0,
+                             0, 0, TEGRA_PERIPH_NO_GATE, tegra_clk_sor0_out,
+                             NULL, 0, &sor0_lock),
 };
 
 static struct clk **clks;