clk: pxa: core pll is not affected by t bit

The t bit of clkfcfg doesn't affect the core pll clock, but it makes core
clock select between core pll clock and core run clock.

As such remove it from the core pll rate reporting function, while it
remains in clk_pxa27x_core_get_parent().

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

diff --git a/drivers/clk/pxa/clk-pxa25x.c b/drivers/clk/pxa/clk-pxa25x.c
index a98b98e2a9e4404047d5f965924a660464a13ec6..3bb603a27f2b1345da6bf7e76f1e25d5ae0ddee7 100644 (file)
--- a/drivers/clk/pxa/clk-pxa25x.c
+++ b/drivers/clk/pxa/clk-pxa25x.c
@@ -182,9 +182,7 @@ static unsigned long clk_pxa25x_cpll_get_rate(struct clk_hw *hw,
        m = M_clk_mult[(cccr >> 5) & 0x03];
        n2 = N2_clk_mult[(cccr >> 7) & 0x07];
 
-       if (t)
-               return m * l * n2 * parent_rate / 2;
-       return m * l * parent_rate;
+       return m * l * n2 * parent_rate / 2;
 }
 PARENTS(clk_pxa25x_cpll) = { "osc_3_6864mhz" };
 RATE_RO_OPS(clk_pxa25x_cpll, "cpll");

diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c
index afc395b4148ee21737a18c5c46e88f5f9d0f2fbe..3930053543a367804e881af0a1d2e9784846dbf0 100644 (file)
--- a/drivers/clk/pxa/clk-pxa27x.c
+++ b/drivers/clk/pxa/clk-pxa27x.c
@@ -162,7 +162,7 @@ static unsigned long clk_pxa27x_cpll_get_rate(struct clk_hw *hw,
        L  = l * parent_rate;
        N  = (L * n2) / 2;
 
-       return t ? N : L;
+       return N;
 }
 PARENTS(clk_pxa27x_cpll) = { "osc_13mhz" };
 RATE_RO_OPS(clk_pxa27x_cpll, "cpll");