ARM: dts: r8a7745: Add I2C DT support

Add I2C[0-5] devices to the r8a7745 device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 18ca7ae8dd3fc7b2925278ad6b12f4cec9b31d32..2fa989f631a96aa46a9ad46671e63b0d94e0f660 100644 (file)
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -18,6 +18,15 @@ / {
        #address-cells = <2>;
        #size-cells = <2>;
 
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -613,6 +622,90 @@ ether: ethernet@ee700000 {
                        #size-cells = <0>;
                        status = "disabled";
                };
+
+               i2c0: i2c@e6508000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a7745",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6508000 0 0x40>;
+                       interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 931>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 931>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@e6518000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a7745",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6518000 0 0x40>;
+                       interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 930>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 930>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@e6530000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a7745",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6530000 0 0x40>;
+                       interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 929>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 929>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@e6540000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a7745",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6540000 0 0x40>;
+                       interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 928>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 928>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c4: i2c@e6520000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a7745",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6520000 0 0x40>;
+                       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 927>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 927>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
+
+               i2c5: i2c@e6528000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,i2c-r8a7745",
+                                    "renesas,rcar-gen2-i2c";
+                       reg = <0 0xe6528000 0 0x40>;
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 925>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 925>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       status = "disabled";
+               };
        };
 
        /* External root clock */