]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: dts: hisi: Enable Hisi LPC node for hip06
authorJohn Garry <john.garry@huawei.com>
Mon, 30 Apr 2018 15:15:41 +0000 (23:15 +0800)
committerWei Xu <xuwei5@hisilicon.com>
Tue, 15 May 2018 13:52:43 +0000 (14:52 +0100)
The patch enables the HiSi LPC node for hip06, with
IPMI and UART child devices.

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hip06-d03.dts
arch/arm64/boot/dts/hisilicon/hip06.dtsi

index 9af633021a42a62460bed98a66ba63c244123177..a95c6f5619bfed8ded000442627bad2383fde3ed 100644 (file)
@@ -25,6 +25,14 @@ memory@0 {
        chosen { };
 };
 
+&ipmi0 {
+       status = "ok";
+};
+
+&uart0 {
+       status = "ok";
+};
+
 &eth0 {
        status = "ok";
 };
index 35202ebe62a744decfad6b40823620d31ee300f0..d78a6a755d03dfb1c2ac6ffacd1a990fec9fa7b8 100644 (file)
@@ -350,6 +350,27 @@ soc {
                #size-cells = <2>;
                ranges;
 
+               isa@a01b0000 {
+                       compatible = "hisilicon,hip06-lpc";
+                       #size-cells = <1>;
+                       #address-cells = <2>;
+                       reg = <0x0 0xa01b0000 0x0 0x1000>;
+
+                       ipmi0: bt@e4 {
+                               compatible = "ipmi-bt";
+                               device_type = "ipmi";
+                               reg = <0x01 0xe4 0x04>;
+                               status = "disabled";
+                       };
+
+                       uart0: lpc-uart@2f8 {
+                               compatible = "ns16550a";
+                               clock-frequency = <1843200>;
+                               reg = <0x01 0x2f8 0x08>;
+                               status = "disabled";
+                       };
+               };
+
                refclk: refclk {
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;