ARM: dts: kirkwood: add pinctrl node to common SoC include

All Kirkwood SoCs have their pinctrl registers at the same address.
Instead of replaying the same reg property on each SoC, have the
reg property set in the common SoC file already. This also allows
us to move common pinctrl settings to this node later on.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-7-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi
index 4f1eef36a7acad84331465ff022c1a7231ce6795..c008e9a877d5f2b2d2da460fd8ccab630a5349d0 100644 (file)
--- a/arch/arm/boot/dts/kirkwood-6192.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6192.dtsi
@@ -37,7 +37,6 @@ pcie0: pcie@1,0 {
        ocp@f1000000 {
                pinctrl: pin-controller@10000 {
                        compatible = "marvell,88f6192-pinctrl";
-                       reg = <0x10000 0x20>;
 
                        pmx_nand: pmx-nand {
                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",

diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi
index d95a7a9cfd1ebd1935231ce3f9fb4df62acd7793..3674a9b9552e5eed8c7dd88bd80f7dcda5f31522 100644 (file)
--- a/arch/arm/boot/dts/kirkwood-6281.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
@@ -37,7 +37,6 @@ pcie0: pcie@1,0 {
        ocp@f1000000 {
                pinctrl: pin-controller@10000 {
                        compatible = "marvell,88f6281-pinctrl";
-                       reg = <0x10000 0x20>;
 
                        pmx_nand: pmx-nand {
                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",

diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
index 523d6feeaf1948153eabd04bd5726e9b85748eb9..89a6ba149ec2701b701bcbb96926b5f5e050454e 100644 (file)
--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -58,7 +58,6 @@ ocp@f1000000 {
 
                pinctrl: pin-controller@10000 {
                        compatible = "marvell,88f6282-pinctrl";
-                       reg = <0x10000 0x20>;
 
                        pmx_nand: pmx-nand {
                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",

diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
index c59e7b75b16949ab4fa39bc18a8dd09e47fecea5..4a2d1b12d1ca9f72081d62dea651ba9582d0645c 100644 (file)
--- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
+++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi
@@ -2,7 +2,6 @@ / {
        ocp@f1000000 {
                pinctrl: pin-controller@10000 {
                        compatible = "marvell,98dx4122-pinctrl";
-                       reg = <0x10000 0x20>;
 
                        pmx_nand: pmx-nand {
                                marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",

diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 2570e0f1673f40d8e9a430921ae00d9f3a9f9723..028003e1211180c4dd5c9df3eb633145b7e24bc6 100644 (file)
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -71,6 +71,11 @@ ocp@f1000000 {
                #address-cells = <1>;
                #size-cells = <1>;
 
+               pinctrl: pin-controller@10000 {
+                       /* set compatible property in SoC file */
+                       reg = <0x10000 0x20>;
+               };
+
                core_clk: core-clocks@10030 {
                        compatible = "marvell,kirkwood-core-clock";
                        reg = <0x10030 0x4>;