]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon
authorRafał Miłecki <rafal@milecki.pl>
Tue, 18 Dec 2018 15:57:44 +0000 (16:57 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 21 Dec 2018 10:44:06 +0000 (11:44 +0100)
As pointed by Rob, CRU is a kind of block that can't be guaranteed to
have everything exposed as subnodes. It's a set of various registers
that aren't tied to any single device. It could be described much more
accurately as MFD (Multi-Function Device).

Some hardware blocks may indeed want to access a register or two of the
CRU which requires describing it as the "syscon".

While at it replace exmple node name with the standard "pinctrl" (also
pointed out by Rob).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt

index 4fa9539070cb0df9e0beb76252c7a557c5e72353..8ab2d468dbdb8869e3f7ae98344aaf1111ad7792 100644 (file)
@@ -7,13 +7,15 @@ configure controller correctly.
 
 A list of pins varies across chipsets so few bindings are available.
 
+Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"
+noce.
+
 Required properties:
 - compatible: must be one of:
        "brcm,bcm4708-pinmux"
        "brcm,bcm4709-pinmux"
        "brcm,bcm53012-pinmux"
-- reg: iomem address range of CRU (Central Resource Unit) pin registers
-- reg-names: "cru_gpio_control" - the only needed & supported reg right now
+- offset: offset of pin registers in the CRU block
 
 Functions and their groups available for all chipsets:
 - "spi": "spi_grp"
@@ -37,16 +39,12 @@ Example:
                #size-cells = <1>;
 
                cru@100 {
-                       compatible = "simple-bus";
+                       compatible = "syscon", "simple-mfd";
                        reg = <0x100 0x1a4>;
-                       ranges;
-                       #address-cells = <1>;
-                       #size-cells = <1>;
 
-                       pin-controller@1c0 {
+                       pinctrl {
                                compatible = "brcm,bcm4708-pinmux";
-                               reg = <0x1c0 0x24>;
-                               reg-names = "cru_gpio_control";
+                               offset = <0xc0>;
 
                                spi-pins {
                                        function = "spi";