sh_eth: rename sh_eth_cpu_data::hw_checksum

Commit 62e04b7e0e3c ("sh_eth: rename 'sh_eth_cpu_data::hw_crc'") renamed
the field to 'hw_checksum' for the Ether DMAC "intelligent checksum",
however some Ether MACs implement a simpler checksumming scheme, so that
name now seems misleading. Rename that field to 'csmr' as the "intelligent
checksum" is always controlled by the CSMR register.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index f27a0dc8c56331db3f7063c251333b04716f0365..ee48399838969a124c2ef38753f1ed1aecac699d 100644 (file)
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -555,7 +555,7 @@ static int sh_eth_soft_reset_gether(struct net_device *ndev)
        sh_eth_write(ndev, 0, RDFFR);
 
        /* Reset HW CRC register */
-       if (mdp->cd->hw_checksum)
+       if (mdp->cd->csmr)
                sh_eth_write(ndev, 0, CSMR);
 
        /* Select MII mode */
@@ -619,7 +619,7 @@ static struct sh_eth_cpu_data r7s72100_data = {
        .no_trimd       = 1,
        .no_ade         = 1,
        .xdfar_rw       = 1,
-       .hw_checksum    = 1,
+       .csmr           = 1,
        .tsu            = 1,
        .no_tx_cntrs    = 1,
 };
@@ -668,7 +668,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
        .no_trimd       = 1,
        .no_ade         = 1,
        .xdfar_rw       = 1,
-       .hw_checksum    = 1,
+       .csmr           = 1,
        .tsu            = 1,
        .select_mii     = 1,
        .magic          = 1,
@@ -793,7 +793,7 @@ static struct sh_eth_cpu_data r8a77980_data = {
        .no_trimd       = 1,
        .no_ade         = 1,
        .xdfar_rw       = 1,
-       .hw_checksum    = 1,
+       .csmr           = 1,
        .select_mii     = 1,
        .magic          = 1,
        .cexcr          = 1,
@@ -1045,7 +1045,7 @@ static struct sh_eth_cpu_data sh7734_data = {
        .no_ade         = 1,
        .xdfar_rw       = 1,
        .tsu            = 1,
-       .hw_checksum    = 1,
+       .csmr           = 1,
        .select_mii     = 1,
        .magic          = 1,
        .cexcr          = 1,
@@ -1633,7 +1633,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
                 * the RFS bits are from bit 25 to bit 16. So, the
                 * driver needs right shifting by 16.
                 */
-               if (mdp->cd->hw_checksum)
+               if (mdp->cd->csmr)
                        desc_status >>= 16;
 
                skb = mdp->rx_skbuff[entry];
@@ -2173,7 +2173,7 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
        add_reg(MAFCR);
        if (cd->rtrate)
                add_reg(RTRATE);
-       if (cd->hw_checksum)
+       if (cd->csmr)
                add_reg(CSMR);
        if (cd->select_mii)
                add_reg(RMII_MII);

diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 0c18650bbfe69f7c22a78a87b1c263bd4f2e15e5..46d2fdf9d45691862bbb3dedb585a44625ab6a3c 100644 (file)
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -499,7 +499,7 @@ struct sh_eth_cpu_data {
        unsigned no_ade:1;      /* E-DMAC DOES NOT have ADE bit in EESR */
        unsigned no_xdfar:1;    /* E-DMAC DOES NOT have RDFAR/TDFAR */
        unsigned xdfar_rw:1;    /* E-DMAC has writeable RDFAR/TDFAR */
-       unsigned hw_checksum:1; /* E-DMAC has CSMR */
+       unsigned csmr:1;        /* E-DMAC has CSMR */
        unsigned select_mii:1;  /* EtherC has RMII_MII (MII select register) */
        unsigned rmiimode:1;    /* EtherC has RMIIMODE register */
        unsigned rtrate:1;      /* EtherC has RTRATE register */