ARM: dts: blanche: add SCIF0/3 pins

Add the (previously omitted) SCIF0/3 pin data to the Blanche board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts
index e7b40f0e7da60b216aa46a6dbbb1c15998b8a12f..9b550bde939afba57085314855492afb92b79612 100644 (file)
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -57,10 +57,28 @@ &extal_clk {
        clock-frequency = <20000000>;
 };
 
+&pfc {
+       scif0_pins: scif0 {
+               groups = "scif0_data";
+               function = "scif0";
+       };
+
+       scif3_pins: scif3 {
+               groups = "scif3_data";
+               function = "scif3";
+       };
+};
+
 &scif0 {
+       pinctrl-0 = <&scif0_pins>;
+       pinctrl-names = "default";
+
        status = "okay";
 };
 
 &scif3 {
+       pinctrl-0 = <&scif3_pins>;
+       pinctrl-names = "default";
+
        status = "okay";
 };