]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
IB/rdmavt, IB/hfi1: Create device dependent s_flags
authorMike Marciniszyn <mike.marciniszyn@intel.com>
Mon, 4 Jun 2018 18:44:02 +0000 (11:44 -0700)
committerJason Gunthorpe <jgg@mellanox.com>
Tue, 19 Jun 2018 17:49:46 +0000 (11:49 -0600)
Move some s_flags defines out of rdmavt and into hfi1 because they are
hfi1 specific and therefore should remain in the driver instead of
bubbling up to rdmavt.

Document device specific ranges in rdmavt and remap
those in hfi1.

Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Kaike Wan <kaike.wan@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/hfi1/pio.c
drivers/infiniband/hw/hfi1/qp.c
drivers/infiniband/hw/hfi1/qp.h
drivers/infiniband/hw/hfi1/rc.c
drivers/infiniband/hw/hfi1/ruc.c
drivers/infiniband/hw/hfi1/verbs.c
include/rdma/rdmavt_qp.h

index 9cac15d10c4ff09afdd710c452031ed7725b6631..363ab0f35369610d259ea5f2acecb0cc957e641d 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright(c) 2015-2017 Intel Corporation.
+ * Copyright(c) 2015-2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
@@ -1618,11 +1618,11 @@ static void sc_piobufavail(struct send_context *sc)
        /* Wake up the most starved one first */
        if (n)
                hfi1_qp_wakeup(qps[max_idx],
-                              RVT_S_WAIT_PIO | RVT_S_WAIT_PIO_DRAIN);
+                              RVT_S_WAIT_PIO | HFI1_S_WAIT_PIO_DRAIN);
        for (i = 0; i < n; i++)
                if (i != max_idx)
                        hfi1_qp_wakeup(qps[i],
-                                      RVT_S_WAIT_PIO | RVT_S_WAIT_PIO_DRAIN);
+                                      RVT_S_WAIT_PIO | HFI1_S_WAIT_PIO_DRAIN);
 }
 
 /* translate a send credit update to a bit code of reasons */
index 1697d96151bd16bcf3a142e9e220e8bcc1986b71..9b1e84a6b1ccb67e3ffae2eaf7603ae73d7ac03a 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright(c) 2015 - 2017 Intel Corporation.
+ * Copyright(c) 2015 - 2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
@@ -273,7 +273,7 @@ void hfi1_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr,
        if (attr_mask & IB_QP_PATH_MIG_STATE &&
            attr->path_mig_state == IB_MIG_MIGRATED &&
            qp->s_mig_state == IB_MIG_ARMED) {
-               qp->s_flags |= RVT_S_AHG_CLEAR;
+               qp->s_flags |= HFI1_S_AHG_CLEAR;
                priv->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr);
                priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc);
                priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc);
@@ -717,7 +717,7 @@ void hfi1_migrate_qp(struct rvt_qp *qp)
        qp->remote_ah_attr = qp->alt_ah_attr;
        qp->port_num = rdma_ah_get_port_num(&qp->alt_ah_attr);
        qp->s_pkey_index = qp->s_alt_pkey_index;
-       qp->s_flags |= RVT_S_AHG_CLEAR;
+       qp->s_flags |= HFI1_S_AHG_CLEAR;
        priv->s_sc = ah_to_sc(qp->ibqp.device, &qp->remote_ah_attr);
        priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc);
        qp_set_16b(qp);
index b2d4cba8d15b8afaad730d0c5f17c88220a7caef..078cff7560b6902c2c477491d1dc853c28aa4936 100644 (file)
@@ -1,7 +1,7 @@
 #ifndef _QP_H
 #define _QP_H
 /*
- * Copyright(c) 2015 - 2017 Intel Corporation.
+ * Copyright(c) 2015 - 2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
@@ -69,6 +69,26 @@ static inline int hfi1_send_ok(struct rvt_qp *qp)
                 !(qp->s_flags & RVT_S_ANY_WAIT_SEND));
 }
 
+/*
+ * Driver specific s_flags starting at bit 31 down to HFI1_S_MIN_BIT_MASK
+ *
+ * HFI1_S_AHG_VALID - ahg header valid on chip
+ * HFI1_S_AHG_CLEAR - have send engine clear ahg state
+ * HFI1_S_WAIT_PIO_DRAIN - qp waiting for PIOs to drain
+ * HFI1_S_MIN_BIT_MASK - the lowest bit that can be used by hfi1
+ */
+#define HFI1_S_AHG_VALID         0x80000000
+#define HFI1_S_AHG_CLEAR         0x40000000
+#define HFI1_S_WAIT_PIO_DRAIN    0x20000000
+#define HFI1_S_MIN_BIT_MASK      0x01000000
+
+/*
+ * overload wait defines
+ */
+
+#define HFI1_S_ANY_WAIT_IO (RVT_S_ANY_WAIT_IO | HFI1_S_WAIT_PIO_DRAIN)
+#define HFI1_S_ANY_WAIT (HFI1_S_ANY_WAIT_IO | RVT_S_ANY_WAIT_SEND)
+
 /*
  * free_ahg - clear ahg from QP
  */
@@ -77,7 +97,7 @@ static inline void clear_ahg(struct rvt_qp *qp)
        struct hfi1_qp_priv *priv = qp->priv;
 
        priv->s_ahg->ahgcount = 0;
-       qp->s_flags &= ~(RVT_S_AHG_VALID | RVT_S_AHG_CLEAR);
+       qp->s_flags &= ~(HFI1_S_AHG_VALID | HFI1_S_AHG_CLEAR);
        if (priv->s_sde && qp->s_ahgidx >= 0)
                sdma_ahg_free(priv->s_sde, qp->s_ahgidx);
        qp->s_ahgidx = -1;
index 1a1a47ac53c6f049285a30028ba4cde5bd21d5af..1d31bd2fa91f85291b562eb364349863e76b2aeb 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright(c) 2015, 2016 Intel Corporation.
+ * Copyright(c) 2015 - 2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
@@ -241,7 +241,7 @@ static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
        smp_wmb();
        qp->s_flags &= ~(RVT_S_RESP_PENDING
                                | RVT_S_ACK_PENDING
-                               | RVT_S_AHG_VALID);
+                               | HFI1_S_AHG_VALID);
        return 0;
 }
 
@@ -1024,7 +1024,7 @@ static void reset_psn(struct rvt_qp *qp, u32 psn)
        if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
            (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
                qp->s_flags |= RVT_S_WAIT_PSN;
-       qp->s_flags &= ~RVT_S_AHG_VALID;
+       qp->s_flags &= ~HFI1_S_AHG_VALID;
 }
 
 /*
index ef4c566e206f9f9ef5eb4ba7c46fa5cd8811cb68..5f56f3c1b4c4e42d9de35f014fb554252fa3f758 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright(c) 2015 - 2017 Intel Corporation.
+ * Copyright(c) 2015 - 2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
@@ -194,7 +194,7 @@ static void ruc_loopback(struct rvt_qp *sqp)
        spin_lock_irqsave(&sqp->s_lock, flags);
 
        /* Return if we are already busy processing a work request. */
-       if ((sqp->s_flags & (RVT_S_BUSY | RVT_S_ANY_WAIT)) ||
+       if ((sqp->s_flags & (RVT_S_BUSY | HFI1_S_ANY_WAIT)) ||
            !(ib_rvt_state_ops[sqp->state] & RVT_PROCESS_OR_FLUSH_SEND))
                goto unlock;
 
@@ -533,9 +533,9 @@ static inline void build_ahg(struct rvt_qp *qp, u32 npsn)
 {
        struct hfi1_qp_priv *priv = qp->priv;
 
-       if (unlikely(qp->s_flags & RVT_S_AHG_CLEAR))
+       if (unlikely(qp->s_flags & HFI1_S_AHG_CLEAR))
                clear_ahg(qp);
-       if (!(qp->s_flags & RVT_S_AHG_VALID)) {
+       if (!(qp->s_flags & HFI1_S_AHG_VALID)) {
                /* first middle that needs copy  */
                if (qp->s_ahgidx < 0)
                        qp->s_ahgidx = sdma_ahg_alloc(priv->s_sde);
@@ -544,7 +544,7 @@ static inline void build_ahg(struct rvt_qp *qp, u32 npsn)
                        priv->s_ahg->tx_flags |= SDMA_TXREQ_F_AHG_COPY;
                        /* save to protect a change in another thread */
                        priv->s_ahg->ahgidx = qp->s_ahgidx;
-                       qp->s_flags |= RVT_S_AHG_VALID;
+                       qp->s_flags |= HFI1_S_AHG_VALID;
                }
        } else {
                /* subsequent middle after valid */
@@ -650,7 +650,7 @@ static inline void hfi1_make_ruc_header_16B(struct rvt_qp *qp,
        if (middle)
                build_ahg(qp, bth2);
        else
-               qp->s_flags &= ~RVT_S_AHG_VALID;
+               qp->s_flags &= ~HFI1_S_AHG_VALID;
 
        bth0 |= pkey;
        bth0 |= extra_bytes << 20;
@@ -727,7 +727,7 @@ static inline void hfi1_make_ruc_header_9B(struct rvt_qp *qp,
        if (middle)
                build_ahg(qp, bth2);
        else
-               qp->s_flags &= ~RVT_S_AHG_VALID;
+               qp->s_flags &= ~HFI1_S_AHG_VALID;
 
        bth0 |= pkey;
        bth0 |= extra_bytes << 20;
index b7c75b63f887604d350136243a0012bae76b4fea..5cef1224fa9c3d4c5619c2fe4836ef40b63e1f9c 100644 (file)
@@ -1007,7 +1007,7 @@ static int pio_wait(struct rvt_qp *qp,
                        int was_empty;
 
                        dev->n_piowait += !!(flag & RVT_S_WAIT_PIO);
-                       dev->n_piodrain += !!(flag & RVT_S_WAIT_PIO_DRAIN);
+                       dev->n_piodrain += !!(flag & HFI1_S_WAIT_PIO_DRAIN);
                        qp->s_flags |= flag;
                        was_empty = list_empty(&sc->piowait);
                        iowait_queue(ps->pkts_sent, &priv->s_iowait,
@@ -1376,7 +1376,7 @@ int hfi1_verbs_send(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
                return pio_wait(qp,
                                ps->s_txreq->psc,
                                ps,
-                               RVT_S_WAIT_PIO_DRAIN);
+                               HFI1_S_WAIT_PIO_DRAIN);
        return sr(qp, ps, 0);
 }
 
index 1145a4c154b2424ad5de0172d04d3e284891f60d..927f6d5b6d0f165a7821dcdc3cfe2be619729c45 100644 (file)
@@ -2,7 +2,7 @@
 #define DEF_RDMAVT_INCQP_H
 
 /*
- * Copyright(c) 2016, 2017 Intel Corporation.
+ * Copyright(c) 2016 - 2018 Intel Corporation.
  *
  * This file is provided under a dual BSD/GPLv2 license.  When using or
  * redistributing this file, you may do so under either license.
@@ -91,6 +91,7 @@
  * RVT_S_WAIT_ACK - waiting for an ACK packet before sending more requests
  * RVT_S_SEND_ONE - send one packet, request ACK, then wait for ACK
  * RVT_S_ECN - a BECN was queued to the send engine
+ * RVT_S_MAX_BIT_MASK - The max bit that can be used by rdmavt
  */
 #define RVT_S_SIGNAL_REQ_WR    0x0001
 #define RVT_S_BUSY             0x0002
 #define RVT_S_WAIT_SSN_CREDIT  0x0100
 #define RVT_S_WAIT_DMA         0x0200
 #define RVT_S_WAIT_PIO         0x0400
-#define RVT_S_WAIT_PIO_DRAIN    0x0800
-#define RVT_S_WAIT_TX          0x1000
-#define RVT_S_WAIT_DMA_DESC    0x2000
-#define RVT_S_WAIT_KMEM                0x4000
-#define RVT_S_WAIT_PSN         0x8000
-#define RVT_S_WAIT_ACK         0x10000
-#define RVT_S_SEND_ONE         0x20000
-#define RVT_S_UNLIMITED_CREDIT 0x40000
-#define RVT_S_AHG_VALID                0x80000
-#define RVT_S_AHG_CLEAR                0x100000
-#define RVT_S_ECN              0x200000
+#define RVT_S_WAIT_TX          0x0800
+#define RVT_S_WAIT_DMA_DESC    0x1000
+#define RVT_S_WAIT_KMEM                0x2000
+#define RVT_S_WAIT_PSN         0x4000
+#define RVT_S_WAIT_ACK         0x8000
+#define RVT_S_SEND_ONE         0x10000
+#define RVT_S_UNLIMITED_CREDIT 0x20000
+#define RVT_S_ECN              0x40000
+#define RVT_S_MAX_BIT_MASK     0x800000
+
+/*
+ * Drivers should use s_flags starting with bit 31 down to the bit next to
+ * RVT_S_MAX_BIT_MASK
+ */
 
 /*
  * Wait flags that would prevent any packet type from being sent.
  */
 #define RVT_S_ANY_WAIT_IO \
-       (RVT_S_WAIT_PIO | RVT_S_WAIT_PIO_DRAIN | RVT_S_WAIT_TX | \
+       (RVT_S_WAIT_PIO | RVT_S_WAIT_TX | \
         RVT_S_WAIT_DMA_DESC | RVT_S_WAIT_KMEM)
 
 /*