]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
ARM: dts: ast2600-evb: eMMC configuration
authorAndrew Jeffery <andrew@aj.id.au>
Tue, 27 Aug 2019 07:00:55 +0000 (16:30 +0930)
committerJoel Stanley <joel@jms.id.au>
Fri, 1 Nov 2019 04:59:48 +0000 (15:29 +1030)
Enable the eMMC controller and limit it to 52MHz to avoid the host
controller reporting bus error conditions.

Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-ast2600-evb.dts
arch/arm/boot/dts/aspeed-g6.dtsi

index 9870553919b7c437bed19447d08a23dc2845167c..9443d3e34a6174ee6354759c5743648aff8e086c 100644 (file)
@@ -71,10 +71,16 @@ &mac3 {
        phy-handle = <&ethphy3>;
 };
 
-&emmc {
+&emmc_controller {
        status = "okay";
 };
 
+&emmc {
+       non-removable;
+       bus-width = <4>;
+       max-frequency = <52000000>;
+};
+
 &rtc {
        status = "okay";
 };
index 3a1422f7c49cce10f15640a0e231beeae096576e..7ca45b0ce3c3d30693f4c691aae43bc28d58157e 100644 (file)
@@ -235,7 +235,7 @@ sdhci1: sdhci@1e740200 {
                                };
                        };
 
-                       emmc: sdc@1e750000 {
+                       emmc_controller: sdc@1e750000 {
                                compatible = "aspeed,ast2600-sd-controller";
                                reg = <0x1e750000 0x100>;
                                #address-cells = <1>;
@@ -244,7 +244,7 @@ emmc: sdc@1e750000 {
                                clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
                                status = "disabled";
 
-                               sdhci@1e750100 {
+                               emmc: sdhci@1e750100 {
                                        compatible = "aspeed,ast2600-sdhci";
                                        reg = <0x100 0x100>;
                                        sdhci,auto-cmd12;