]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
drm/amdgpu/gfx10: update golden settings for navi14
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 26 Jul 2019 19:14:15 +0000 (14:14 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 Jul 2019 04:48:32 +0000 (23:48 -0500)
Updated settings for hw team.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

index ef9f552b70013afa1cde41341eba3c0556c1d6b5..e12478a5b9023caa9e0a15c4cff895885f4a88e2 100644 (file)
@@ -138,7 +138,6 @@ static const struct soc15_reg_golden golden_settings_gc_10_1_1[] =
        SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DEBUG4, 0xffffffff, 0x04900000),
        SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_DFSM_TILES_IN_FLIGHT, 0x0000ffff, 0x0000003f),
        SOC15_REG_GOLDEN_VALUE(GC, 0, mmDB_LAST_OF_BURST_CONFIG, 0xffffffff, 0x03860204),
-       SOC15_REG_GOLDEN_VALUE(GC, 0, mmGB_ADDR_CONFIG, 0x0c1800ff, 0x00000043),
        SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCR_GENERAL_CNTL, 0x1ff0ffff, 0x00000500),
        SOC15_REG_GOLDEN_VALUE(GC, 0, mmGE_PRIV_CONTROL, 0x000007ff, 0x000001fe),
        SOC15_REG_GOLDEN_VALUE(GC, 0, mmGL1_PIPE_STEER, 0xffffffff, 0xe4e4e4e4),