arm64: dts: meson: g12a: add ethernet pinctrl definitions

Add the ethernet pinctrl settings for RMII, RGMII and internal phy leds

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index 1d16cd2107eaabc082870274647ef5d50e9bb3af..def02ebf650198fd98e3ec4cc98e0f0ef6213371 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -1109,6 +1109,43 @@ mux {
                                                };
                                        };
 
+                                       eth_leds_pins: eth-leds {
+                                               mux {
+                                                       groups = "eth_link_led",
+                                                                "eth_act_led";
+                                                       function = "eth";
+                                                       bias-disable;
+                                               };
+                                       };
+
+                                       eth_pins: eth {
+                                               mux {
+                                                       groups = "eth_mdio",
+                                                                "eth_mdc",
+                                                                "eth_rgmii_rx_clk",
+                                                                "eth_rx_dv",
+                                                                "eth_rxd0",
+                                                                "eth_rxd1",
+                                                                "eth_txen",
+                                                                "eth_txd0",
+                                                                "eth_txd1";
+                                                       function = "eth";
+                                                       bias-disable;
+                                               };
+                                       };
+
+                                       eth_rgmii_pins: eth-rgmii {
+                                               mux {
+                                                       groups = "eth_rxd2_rgmii",
+                                                                "eth_rxd3_rgmii",
+                                                                "eth_rgmii_tx_clk",
+                                                                "eth_txd2_rgmii",
+                                                                "eth_txd3_rgmii";
+                                                       function = "eth";
+                                                       bias-disable;
+                                               };
+                                       };
+
                                        tdm_c_din2_z_pins: tdm-c-din2-z {
                                                mux {
                                                        groups = "tdm_c_din2_z";