drm/i915: Replace bxt_verify_cdclk_state() with a more generic cdclk check

Rather than having a BXT specific function to make sure the DE PLL is
enabled after disabling DC6, let's just make sure the current cdclk
is the same as what we last programmed.

Having another check in bxt_display_core_init() almost immediately after
the cdclk init seems redundant, so let's just kill that one.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-21-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a0b46b5b17b270d4b7acff933c1a31c65234c74b..d53b670328e418fd6b7f1ff76fcef251b87b29cc 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5410,21 +5410,6 @@ static void broxton_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
        intel_update_cdclk(dev_priv->dev);
 }
 
-static bool broxton_cdclk_is_enabled(struct drm_i915_private *dev_priv)
-{
-       if (!(I915_READ(BXT_DE_PLL_ENABLE) & BXT_DE_PLL_PLL_ENABLE))
-               return false;
-
-       /* TODO: Check for a valid CDCLK rate */
-
-       return true;
-}
-
-bool broxton_cdclk_verify_state(struct drm_i915_private *dev_priv)
-{
-       return broxton_cdclk_is_enabled(dev_priv);
-}
-
 void broxton_init_cdclk(struct drm_i915_private *dev_priv)
 {
        intel_update_cdclk(dev_priv->dev);

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3854b2ee1077d0e778c96ff5ce2ccf436f75fcc8..03d4b1ade2d176b3bf6fc8874af00206a86e62f9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1270,7 +1270,6 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv);
 void hsw_disable_pc8(struct drm_i915_private *dev_priv);
 void broxton_init_cdclk(struct drm_i915_private *dev_priv);
 void broxton_uninit_cdclk(struct drm_i915_private *dev_priv);
-bool broxton_cdclk_verify_state(struct drm_i915_private *dev_priv);
 void broxton_ddi_phy_init(struct drm_i915_private *dev_priv);
 void broxton_ddi_phy_uninit(struct drm_i915_private *dev_priv);
 void broxton_ddi_phy_verify_state(struct drm_i915_private *dev_priv);

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index dc74f38d945ffee723282758b5fb32faeafc97db..a1741182f92468fc23b03ce78a77a1c63a60c216 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -811,10 +811,11 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
 {
        gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
-       if (IS_BROXTON(dev_priv)) {
-               broxton_cdclk_verify_state(dev_priv);
+       WARN_ON(dev_priv->cdclk_freq !=
+               dev_priv->display.get_display_clock_speed(dev_priv->dev));
+
+       if (IS_BROXTON(dev_priv))
                broxton_ddi_phy_verify_state(dev_priv);
-       }
 }
 
 static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
@@ -2288,7 +2289,6 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv,
 
        broxton_ddi_phy_init(dev_priv);
 
-       broxton_cdclk_verify_state(dev_priv);
        broxton_ddi_phy_verify_state(dev_priv);
 
        if (resume && dev_priv->csr.dmc_payload)