]> asedeno.scripts.mit.edu Git - linux.git/commitdiff
arm64: tegra: Support 200 MHz for SDMMC on Tegra194
authorSowjanya Komatineni <skomatineni@nvidia.com>
Thu, 13 Dec 2018 21:14:30 +0000 (13:14 -0800)
committerThierry Reding <treding@nvidia.com>
Thu, 7 Feb 2019 18:03:57 +0000 (19:03 +0100)
Change the SDMMC clock source to support a maximum frequency of 200 MHz
on Tegra194.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra194.dtsi

index ae9e593e149e838c4ab94c51112225d1d06f1ab7..560c1b695825ea79e504194bcc8fca6463a43999 100644 (file)
@@ -346,6 +346,10 @@ sdmmc4: sdhci@3460000 {
                        interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
                        clock-names = "sdhci";
+                       assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
+                                         <&bpmp TEGRA194_CLK_PLLC4>;
+                       assigned-clock-parents =
+                                         <&bpmp TEGRA194_CLK_PLLC4>;
                        resets = <&bpmp TEGRA194_RESET_SDMMC4>;
                        reset-names = "sdhci";
                        nvidia,pad-autocal-pull-up-offset-hs400 = <0x00>;