drm/i915/guc: Split out the mmio_white_list struct

We are going to need it for future platforms.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 41ec8af526a51aaf02ab3e612f0b5c2b9949b235..f9a8a4b6add60ce1637030e129767c80abd96e99 100644 (file)
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -1049,11 +1049,11 @@ static int guc_ads_create(struct intel_guc *guc)
 
        /* MMIO reg state */
        for_each_engine(engine, dev_priv, id) {
-               blob->reg_state.mmio_white_list[engine->guc_id].mmio_start =
+               blob->reg_state.white_list[engine->guc_id].mmio_start =
                        engine->mmio_base + GUC_MMIO_WHITE_LIST_START;
 
                /* Nothing to be saved or restored for now. */
-               blob->reg_state.mmio_white_list[engine->guc_id].count = 0;
+               blob->reg_state.white_list[engine->guc_id].count = 0;
        }
 
        /*

diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 18131b7289a5c50543374d121c85afa32dd9045a..cb36cbf3818f3386aa0ca6b490a23e4b630dc5f0 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -409,16 +409,17 @@ struct guc_mmio_regset {
        u32 number_of_registers;
 } __packed;
 
+/* MMIO registers that are set as non privileged */
+struct mmio_white_list {
+       u32 mmio_start;
+       u32 offsets[GUC_MMIO_WHITE_LIST_MAX];
+       u32 count;
+} __packed;
+
 struct guc_mmio_reg_state {
        struct guc_mmio_regset global_reg;
        struct guc_mmio_regset engine_reg[GUC_MAX_ENGINES_NUM];
-
-       /* MMIO registers that are set as non privileged */
-       struct __packed {
-               u32 mmio_start;
-               u32 offsets[GUC_MMIO_WHITE_LIST_MAX];
-               u32 count;
-       } mmio_white_list[GUC_MAX_ENGINES_NUM];
+       struct mmio_white_list white_list[GUC_MAX_ENGINES_NUM];
 } __packed;
 
 /* GuC Additional Data Struct */